https://bugs.llvm.org/show_bug.cgi?id=34877
Bug ID: 34877
Summary: [X86] Masked EVEX instructions that produce less than
128-bits probably have incorrect patterns
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
As far as I can tell from Intel's docs, instructions that write less than
128-bits like "vpmovwb xmm, xmm" or "vcvtpd2ps xmm, xmm" don't use the mask
register bits for the unwritten elements. Those elements are always zeroed
regardless of the mask. I think this means we can't match a regular vselect to
these instructions.
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