https://bugs.llvm.org/show_bug.cgi?id=35911
Bug ID: 35911
Summary: BTS/BTR are preferable to MOVABS+AND
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedb...@nondot.org
Reporter: d...@znu.io
CC: llvm-bugs@lists.llvm.org
On both high-end and low-end Intel processors, using BTS/BTR to set/clear any
of the high 32 bits of a 64 bit register is preferable to the current MOVABS
followed by an AND instruction. BTS/BTR have latency of 1 cycle, but MOVABS+AND
has a combined latency of 2 cycles. The code density of BTS/BTR is more than
twice as good as MOVABS+AND and therefore decoder throughput is much better
too.
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