https://bugs.llvm.org/show_bug.cgi?id=43238
Bug ID: 43238
Summary: Integer promotion quirk prevents efficient power of 2
division
Product: clang
Version: 8.0
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: LLVM Codegen
Assignee: unassignedclangb...@nondot.org
Reporter: kim.nils...@effnet.com
CC: llvm-bugs@lists.llvm.org, neeil...@live.com,
richard-l...@metafoo.co.uk
Created attachment 22476
--> https://bugs.llvm.org/attachment.cgi?id=22476&action=edit
Example LLVM IR
For the function,
uint_fast32_t foo_a(uint_fast8_t x) {
const uint_fast32_t q = 1 << x;
return 256 / q;
}
GCC-{8.*,9.*} generates inefficient division instructions for both x86_64 and
ARM. Since 'q' is a power of 2, the result should be a single right shift.
Indeed, if the function is changed to,
uint_fast32_t foo_b(uint_fast8_t x) {
return 256 / (1 << x); // This is, of course, equivalent to (256 >> x)
},
the expected instructions are generated. Counter-intuitively, if the original
function is instead changed slightly to,
uint_fast32_t foo_c(uint_fast8_t x) {
const uint_fast32_t q = (uint_fast32_t)1 << x;
return 256 / q;
},
the expected instructions are once again generated.
See https://godbolt.org/z/X-It3b for examples.
(FWIW, GCC also has this behavior and I've reported the same thing there
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91680)
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