https://bugs.llvm.org/show_bug.cgi?id=49904
Bug ID: 49904
Summary: LLVM 12 regression: AArch64 backend generates
incorrect code for ashr <i8 x 16>
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: AArch64
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected],
[email protected], [email protected],
[email protected]
IR:
define <16 x i8> @simd_ashr(<16 x i8> %a, <16 x i8> %b) {
start:
%0 = ashr <16 x i8> %a, %b
ret <16 x i8> %0
}
llc -march=aarch64 -global-isel=1 -O0 test.ll
simd_ashr: // @simd_ashr
// %bb.0: // %start
neg v1.8h, v1.8h
sshl v0.16b, v0.16b, v1.16b
ret
The neg instruction should be using .16b instead of .8h.
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