https://bugs.llvm.org/show_bug.cgi?id=50986
Bug ID: 50986
Summary: some ARM routines do not align sp to 8-byte boundaries
Product: compiler-rt
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: P
Component: compiler-rt
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Created attachment 25001
--> https://bugs.llvm.org/attachment.cgi?id=25001&action=edit
Fix stack alignment for ARM
For ARM EABI, stack pointer is required to be aligned to 8-byte boundaries.
However, unfortunately, some assembler routines in compiler-rt do not align sp
properly.
This is problematic especially for ARMv5TE; GCC emits {ld,st}rd for [sp, 8*x],
assuming that sp is properly aligned. If not, these instructions cause
alignment faults (operands for {ld,st}rd should be aligned to 8-byte boundaries
for pre-ARMv6 processors).
Please find the attached patch for fix against today's source at GitHub (by
Nick Hudson (skrll at NetBSD dot org) and myself):
(1) For aeabi_cfcmp.S, save ip additionally to ensure number of pushed
registers is even.
(2) For divmodsi4.S, divsi3.S, and modsi3.S, stop saving r7, which is not used
at the moment.
Thanks,
rin
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