Issue |
91025
|
Summary |
[SLPVectorizer] Miscompile with rv64gcv -O3
|
Labels |
|
Assignees |
|
Reporter |
patrick-rivos
|
Partially Reduced LLVM IR (reducing it further causes Alive2 to not recognize the invalid transform):
``` llvm ir
; ModuleID = 'red.ll'
source_filename = "red.c"
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux-gnu"
@var_17 = global i16 31470
@var_9 = global i16 -13679
@arr_0 = global [20 x i16] zeroinitializer
@.str = constant [6 x i8] c"%llu\0A\00"
; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: none, inaccessiblemem: none) uwtable vscale_range(2,1024)
define void @init() #0 {
entry:
store <16 x i16> <i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409, i16 -22409>, ptr @arr_0, align 32
ret void
}
; Function Attrs: nofree nounwind uwtable vscale_range(2,1024)
define noundef signext i64 @main() #1 {
entry:
tail call void @init()
%0 = load i16, ptr @var_9, align 2
%var_17.promoted.i = load i16, ptr @var_17, align 2
%conv15.i = sext i16 %0 to i32
%conv13.i = zext i16 0 to i32
%not.i = xor i32 %conv13.i, -1
%cond19.i = tail call i32 @llvm.smax.i32(i32 %not.i, i32 %conv15.i)
%conv21.i = and i32 %cond19.i, 65535
%conv23.i = zext i16 %var_17.promoted.i to i32
%cond30.i = tail call i32 @llvm.umin.i32(i32 %conv21.i, i32 %conv23.i)
%1 = load i16, ptr getelementptr inbounds ([20 x i16], ptr @arr_0, i64 0, i64 2), align 4
%conv13.1.i = zext i16 %1 to i32
%not.1.i = xor i32 %conv13.1.i, -1
%cond19.1.i = tail call i32 @llvm.smax.i32(i32 %not.1.i, i32 0)
%conv21.1.i = and i32 %cond19.1.i, 65535
%cond30.1.i = tail call i32 @llvm.umin.i32(i32 %conv21.1.i, i32 %cond30.i)
%conv13.2.i = zext i16 0 to i32
%not.2.i = xor i32 %conv13.2.i, -1
%cond19.2.i = tail call i32 @llvm.smax.i32(i32 %not.2.i, i32 %conv15.i)
%conv21.2.i = and i32 %cond19.2.i, 65535
%cond30.2.i = tail call i32 @llvm.umin.i32(i32 %conv21.2.i, i32 %cond30.1.i)
%conv13.3.i = zext i16 0 to i32
%not.3.i = xor i32 %conv13.3.i, -1
%cond19.3.i = tail call i32 @llvm.smax.i32(i32 %not.3.i, i32 %conv15.i)
%conv21.3.i = and i32 %cond19.3.i, 65535
%cond30.3.i = tail call i32 @llvm.umin.i32(i32 %conv21.3.i, i32 %cond30.2.i)
%conv13.4.i = zext i16 0 to i32
%not.4.i = xor i32 %conv13.4.i, -1
%cond19.4.i = tail call i32 @llvm.smax.i32(i32 %not.4.i, i32 %conv15.i)
%conv21.4.i = and i32 %cond19.4.i, 65535
%cond30.4.i = tail call i32 @llvm.umin.i32(i32 %conv21.4.i, i32 %cond30.3.i)
%conv13.5.i = zext i16 0 to i32
%not.5.i = xor i32 %conv13.5.i, -1
%cond19.5.i = tail call i32 @llvm.smax.i32(i32 %not.5.i, i32 %conv15.i)
%conv21.5.i = and i32 %cond19.5.i, 65535
%cond30.5.i = tail call i32 @llvm.umin.i32(i32 %conv21.5.i, i32 %cond30.4.i)
%conv13.6.i = zext i16 0 to i32
%not.6.i = xor i32 %conv13.6.i, -1
%cond19.6.i = tail call i32 @llvm.smax.i32(i32 %not.6.i, i32 %conv15.i)
%conv21.6.i = and i32 %cond19.6.i, 65535
%cond30.6.i = tail call i32 @llvm.umin.i32(i32 %conv21.6.i, i32 %cond30.5.i)
%conv13.7.i = zext i16 0 to i32
%not.7.i = xor i32 %conv13.7.i, -1
%cond19.7.i = tail call i32 @llvm.smax.i32(i32 %not.7.i, i32 %conv15.i)
%conv21.7.i = and i32 %cond19.7.i, 65535
%cond30.7.i = tail call i32 @llvm.umin.i32(i32 %conv21.7.i, i32 %cond30.6.i)
%cond19.8.i = tail call i32 @llvm.smax.i32(i32 -1, i32 %conv15.i)
%conv21.8.i = and i32 %cond19.8.i, 65535
%cond30.8.i = tail call i32 @llvm.umin.i32(i32 %conv21.8.i, i32 %cond30.7.i)
%cond19.9.i = tail call i32 @llvm.smax.i32(i32 -1, i32 %conv15.i)
%conv21.9.i = and i32 %cond19.9.i, 65535
%cond30.9.i = tail call i32 @llvm.umin.i32(i32 %conv21.9.i, i32 %cond30.8.i)
%conv.i = zext nneg i32 %cond30.9.i to i64
%call = tail call signext i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i64 noundef %conv.i)
ret i64 %conv.i
}
; Function Attrs: nofree nounwind
declare noundef signext i32 @printf(ptr nocapture noundef readonly, ...) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3
; uselistorder directives
uselistorder ptr @llvm.smax.i32, { 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
uselistorder ptr @llvm.umin.i32, { 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
attributes #0 = { nofree norecurse nosync nounwind memory(write, argmem: none, inaccessiblemem: none) uwtable vscale_range(2,1024) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic-rv64" "target-features"="+64bit,+a,+c,+d,+f,+m,+relax,+v,+zicsr,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zaamo,-experimental-zabha,-experimental-zalasr,-experimental-zalrsc,-experimental-zfbfmin,-experimental-zicfilp,-experimental-zicfiss,-experimental-ztso,-experimental-zvfbfmin,-experimental-zvfbfwma,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smepmp,-smstateen,-ssaia,-ssccptr,-sscofpmf,-sscounterenw,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-za128rs,-za64rs,-zacas,-zama16b,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-zvbb,-zvbc,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }
attributes #1 = { nofree nounwind uwtable vscale_range(2,1024) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic-rv64" "target-features"="+64bit,+a,+c,+d,+f,+m,+relax,+v,+zicsr,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zaamo,-experimental-zabha,-experimental-zalasr,-experimental-zalrsc,-experimental-zfbfmin,-experimental-zicfilp,-experimental-zicfiss,-experimental-ztso,-experimental-zvfbfmin,-experimental-zvfbfwma,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smepmp,-smstateen,-ssaia,-ssccptr,-sscofpmf,-sscounterenw,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-za128rs,-za64rs,-zacas,-zama16b,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-zvbb,-zvbc,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic-rv64" "target-features"="+64bit,+a,+c,+d,+f,+m,+relax,+v,+zicsr,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zaamo,-experimental-zabha,-experimental-zalasr,-experimental-zalrsc,-experimental-zfbfmin,-experimental-zicfilp,-experimental-zicfiss,-experimental-ztso,-experimental-zvfbfmin,-experimental-zvfbfwma,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smepmp,-smstateen,-ssaia,-ssccptr,-sscofpmf,-sscounterenw,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-za128rs,-za64rs,-zacas,-zama16b,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-zvbb,-zvbc,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```
https://alive2.llvm.org/ce/z/rKSQQ-
Before optimization: 0
After optimization: 22408
Tested using 03972261a93853d3e84857b4bed816648d3549f0
Found via fuzzer
SlpVectorizer so @alexey-bataev
_______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs