| Issue |
98044
|
| Summary |
16 byte Aligned load generated to load 32 byte wide AVX register from stack memory
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
Nirhar
|
Problematic IR:
```
define i8 @foo(i64 %elemIdx, <32 x i1> %arr) {
entry:
br label %loop
loop: ; preds = %loop, %entry
%arr.i32 = bitcast <32 x i1> %arr to i32
%cmp = icmp ugt i32 %arr.i32, 0
br i1 %cmp, label %exit, label %loop
exit: ; preds = %loop
%elem = extractelement <32 x i8> zeroinitializer, i64 %elemIdx
ret i8 %elem
}
```
generates:
```
.LCPI0_0:
.quad 72340172838076673 # 0x101010101010101
foo: # @foo
vpbroadcastq .LCPI0_0(%rip), %ymm1 # ymm1 = [72340172838076673,72340172838076673,72340172838076673,72340172838076673]
.LBB0_1: # %loop
vptest %ymm1, %ymm0
je .LBB0_1
pushq %rbp
movq %rsp, %rbp
andq $-32, %rsp
subq $64, %rsp
vpxor %xmm0, %xmm0, %xmm0
vmovdqa %ymm0, (%rsp)
andl $31, %edi
movzbl (%rsp,%rdi), %eax
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
```
when run with `llc -mattr=avx2`. This leads to the generation of a `vmovdqa` instruction, which can lead to a General Protection Fault. Here is the link to the godbolt demo: https://godbolt.org/z/jaeE4vKr1
The problem seems to be in instruction selection again, similar to #77730
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