| Issue |
148659
|
| Summary |
[AArch64] Expected a GPR64common register, but got a GPR64sp register
|
| Labels |
backend:AArch64
|
| Assignees |
|
| Reporter |
sjoerdmeijer
|
For a build with expensive checks enabled, this input:
```
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64-unknown-linux-gnu"
define void @_Z4testatjatabyxsxtthtaiPA17_hPA17_aS0_PiPA17_S1_PyS5_PA17_tPA17_S7_PA17_A17_iS5_SA_PA17_A17_yPA17_A17_jSA_SD_PA17_A17_s(i8 %var_0, i32 %var_3, i8 %var_4, i1 %var_7, i16 %var_12, i8 %var_14, ptr %arr_23, ptr %arr_40, i32 %or377, i64 %0, i64 %indvars.iv827, i64 %idxprom400.us.us, i64 %idxprom, ptr %arrayidx374.us.us.us, ptr %var_30, ptr %var_31, ptr %var_32, ptr %arrayidx414.us.us.us, ptr %1, ptr %var_33) #0 {
entry:
br label %for.body
for.body: ; preds = %for.cond457.preheader.us.us.us, %entry
br label %for.body350.us.us
for.body350.us.us: ; preds = %for.cond457.preheader.us.us.us, %for.body
%indvars.iv82710 = phi i64 [ %indvars.iv.next828, %for.cond457.preheader.us.us.us ], [ %0, %for.body ]
%conv347727.us.us11 = phi i32 [ %5, %for.cond457.preheader.us.us.us ], [ %or377, %for.body ]
%add387.us.us = add i32 %conv347727.us.us11, 1
%idxprom388.us.us = zext i32 %add387.us.us to i64
%arrayidx401.us.us = getelementptr [17 x [17 x i32]], ptr %arr_40, i64 %idxprom388.us.us, i64 %indvars.iv827, i64 %idxprom400.us.us
store i8 %var_0, ptr %arr_23, align 1
store i16 %var_12, ptr %var_30, align 2
br label %for.body383.us.us.us
for.body383.us.us.us: ; preds = %for.body383.us.us.us, %for.body350.us.us
%indvars.iv82416 = phi i64 [ %indvars.iv.next825, %for.body383.us.us.us ], [ 0, %for.body350.us.us ]
%2 = phi i8 [ 0, %for.body383.us.us.us ], [ %var_14, %for.body350.us.us ]
store i8 %var_4, ptr %var_31, align 1
%3 = load i32, ptr %arrayidx401.us.us, align 4
%cmp404.us.us.us = icmp sle i32 %3, %var_3
%conv405.us.us.us = zext i1 %cmp404.us.us.us to i8
store i8 %conv405.us.us.us, ptr %var_32, align 1
%arrayidx425.us.us.us = getelementptr [17 x [17 x i32]], ptr %arr_23, i64 %indvars.iv82710, i64 4307, i64 %indvars.iv82416
%arrayidx414.us.us.us17 = getelementptr [17 x [17 x i16]], ptr null, i64 0, i64 %indvars.iv82416, i64 0
store i8 0, ptr %1, align 1
store i64 %idxprom, ptr %var_33, align 8
%4 = load i32, ptr %arrayidx425.us.us.us, align 4
store i8 %2, ptr %arrayidx414.us.us.us, align 1
store i64 1, ptr %arrayidx374.us.us.us, align 8
%indvars.iv.next825 = add i64 %indvars.iv82416, 1
br i1 %var_7, label %for.body383.us.us.us, label %for.cond457.preheader.us.us.us
for.cond457.preheader.us.us.us: ; preds = %for.body383.us.us.us
%indvars.iv.next828 = add i64 %indvars.iv82710, 1
%5 = trunc i64 %indvars.iv.next828 to i32
%cmp348.us.us = icmp ult i64 %indvars.iv82710, 0
br i1 %cmp348.us.us, label %for.body350.us.us, label %for.body
}
attributes #0 = { "frame-pointer"="non-leaf" "target-cpu"="grace" }
```
runs into this error:
```
*** Bad machine code: Illegal virtual register for instruction ***
- function: _Z4testatjatabyxsxtthtaiPA17_hPA17_aS0_PiPA17_S1_PyS5_PA17_tPA17_S7_PA17_A17_iS5_SA_PA17_A17_yPA17_A17_jSA_SD_PA17_A17_s
- basic block: %bb.137 (0xaaaaaf9ba718) [32608B;32720B)
- instruction: 32672B undef %526.sub_32:gpr64sp = LDRWui %stack.36, 0 :: (load (s32) from %stack.36)
- operand 0: undef %526.sub_32:gpr64sp
Expected a GPR64common register, but got a GPR64sp register
*** Bad machine code: Illegal virtual register for instruction ***
- function: _Z4testatjatabyxsxtthtaiPA17_hPA17_aS0_PiPA17_S1_PyS5_PA17_tPA17_S7_PA17_A17_iS5_SA_PA17_A17_yPA17_A17_jSA_SD_PA17_A17_s
- basic block: %bb.99 for.body350.us.us.preheader (0xaaaaaf7feb10) [32720B;32832B)
- instruction: 32800B undef %494.sub_32:gpr64sp = LDRWui %stack.36, 0 :: (load (s32) from %stack.36)
- operand 0: undef %494.sub_32:gpr64sp
Expected a GPR64common register, but got a GPR64sp register
LLVM ERROR: Found 2 machine code errors.
```
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