Issue 149092
Summary [AArch64] STPQi: Bad machine code: Using an undefined physical register
Labels backend:AArch64
Assignees
Reporter sjoerdmeijer
    For a build with expensive checks enabled, this input:

```
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64-unknown-linux-gnu"

; Function Attrs: vscale_range(1,1)
define void @_Z4testbyyaiybiaaaayiibaabi(<vscale x 16 x i8> %0, <vscale x 16 x i64> %1, <vscale x 16 x i64> %broadcast.splatinsert1508, <vscale x 16 x i1> %2, <vscale x 16 x ptr> %3, i1 %4, <vscale x 16 x ptr> %5) #0 {
entry:
  %6 = tail call <vscale x 16 x i64> @llvm.stepvector.nxv16i64()
  %7 = mul <vscale x 16 x i64> %6, %1
 %induction1538 = add <vscale x 16 x i64> %7, %broadcast.splatinsert1508
  br label %vector.body1541

vector.body1541:                                  ; preds = %vector.body1541, %entry
  %vec.ind15449 = phi <vscale x 16 x i64> [ %induction1538, %entry ], [ %1, %vector.body1541 ]
  %8 = getelementptr [17 x [17 x [17 x i8]]], ptr null, i64 0, i64 0, i64 0, <vscale x 16 x i64> %vec.ind15449
  tail call void @llvm.masked.scatter.nxv16i8.nxv16p0(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x ptr> %8, i32 0, <vscale x 16 x i1> splat (i1 true))
  tail call void @llvm.masked.scatter.nxv16i8.nxv16p0(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x ptr> %3, i32 0, <vscale x 16 x i1> splat (i1 true))
  br i1 %4, label %vector.body1541, label %for.cond563.us.preheader

vector.body1485: ; preds = %for.cond563.us.preheader, %vector.body1485
  tail call void @llvm.masked.scatter.nxv16i8.nxv16p0(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x ptr> %5, i32 0, <vscale x 16 x i1> %2)
  br label %vector.body1485

for.cond563.us.preheader:                         ; preds = %vector.body1541
  %9 = tail call <vscale x 16 x i64> @llvm.stepvector.nxv16i64()
  %10 = mul <vscale x 16 x i64> %9, %1
  %11 = getelementptr [17 x [17 x [17 x i8]]], ptr null, i64 0, i64 0, i64 0, <vscale x 16 x i64> %10
  tail call void @llvm.masked.scatter.nxv16i8.nxv16p0(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x ptr> %11, i32 0, <vscale x 16 x i1> %2)
  br label %vector.body1485
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare <vscale x 16 x i64> @llvm.stepvector.nxv16i64() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(write)
declare void @llvm.masked.scatter.nxv16i8.nxv16p0(<vscale x 16 x i8>, <vscale x 16 x ptr>, i32 immarg, <vscale x 16 x i1>) #2

; uselistorder directives
uselistorder ptr @llvm.stepvector.nxv16i64, { 1, 0 }
uselistorder ptr @llvm.masked.scatter.nxv16i8.nxv16p0, { 3, 2, 1, 0 }

attributes #0 = { vscale_range(1,1) "target-cpu"="grace" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(write) }
```

runs into this error:

```
*** Bad machine code: Using an undefined physical register ***
- function:    _Z4testbyyaiybiaaaayiibaabi
- basic block: %bb.0 entry (0xaaaaaf6c3aa8)
- instruction: STPQi $q25, $q12, $sp, 0 :: (store (s128) into %stack.10), (store (s128) into %stack.9)
- operand 0: $q25
LLVM ERROR: Found 1 machine code errors.
```

This is a different opcode than #149034, so I am assuming this is a different issue. 
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