| Issue |
163774
|
| Summary |
[hexagon] "Bad machine code: Virtual register defs don't dominate all uses." when bootstrapping
|
| Labels |
backend:Hexagon
|
| Assignees |
|
| Reporter |
androm3da
|
When building LLVM for hexagon, we see the failure shown below. The compiler hits this error when building `AArch64MCCodeEmitter.cpp`.
```
./bin/llc --mtriple=hexagon ./reduced.ll
remark: Misaligned constant address: 0x0000003c has alignment 4, but the memory access requires 8. The instruction has been replaced with a trap.
# After Instruction Selection
# Machine code for function _ZNK12_GLOBAL__N_120AArch64MCCodeEmitter21getBinaryCodeForInstrERKN4llvm6MCInstERNS1_15SmallVectorImplINS1_7MCFixupEEERKNS1_15MCSubtargetInfoE: IsSSA, TracksLiveness
Frame Objects:
...
*** Bad machine code: Virtual register defs don't dominate all uses. ***
- function: _ZNK12_GLOBAL__N_120AArch64MCCodeEmitter21getBinaryCodeForInstrERKN4llvm6MCInstERNS1_15SmallVectorImplINS1_7MCFi
xupEEERKNS1_15MCSubtargetInfoE
- v. register: %3611
...
```
Reduced test case, output from llc:
* [reduced.ll.txt](https://github.com/user-attachments/files/22950065/reduced.ll.txt)
* [unabridged output from llc](https://github.com/user-attachments/files/22950068/aarch64_mccode.txt)
Original issue reported by @alexrp:
>One other crash:
> https://files.alexrp.com/AArch64MCCodeEmitter-02318c.cpp
> https://files.alexrp.com/AArch64MCCodeEmitter-02318c.sh
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