| Issue |
180492
|
| Summary |
InstCombine should fold shift of boolean zext to logic sequence
|
| Labels |
llvm:instcombine,
missed-optimization
|
| Assignees |
|
| Reporter |
arsenm
|
https://alive2.llvm.org/ce/z/Dy33X8
```
define i1 @src(i1 %x, i1 %y) {
%x.ext = zext i1 %x to i32
%y.ext = zext i1 %y to i32
%shl = shl i32 %x.ext, %y.ext
%result = icmp eq i32 %shl, 1
ret i1 %result
}
define i1 @tgt(i1 %x, i1 %y) {
%not.y = xor i1 %y, true
%result = and i1 %x, %not.y
ret i1 %result
}
```
This pattern was found in [older rocm device libs versions](https://github.com/ROCm/llvm-project/commit/ee84ee4272d91dc9b0ee17ee44fce11ddaa17b5f)
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