Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.20 -> 1.21 --- Log message: Implement a method for inline asm support --- Diffs of the changes: (+17 -0) TargetLowering.cpp | 17 +++++++++++++++++ 1 files changed, 17 insertions(+) Index: llvm/lib/Target/TargetLowering.cpp diff -u llvm/lib/Target/TargetLowering.cpp:1.20 llvm/lib/Target/TargetLowering.cpp:1.21 --- llvm/lib/Target/TargetLowering.cpp:1.20 Wed Jan 25 12:57:15 2006 +++ llvm/lib/Target/TargetLowering.cpp Thu Jan 26 14:37:03 2006 @@ -13,7 +13,9 @@ #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/MRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/ADT/StringExtras.h" using namespace llvm; TargetLowering::TargetLowering(TargetMachine &tm) @@ -132,3 +134,18 @@ uint64_t Mask) const { return false; } + +std::vector<unsigned> TargetLowering:: +getRegForInlineAsmConstraint(const std::string &Constraint) const { + // Scan to see if this constraint is a register name. + const MRegisterInfo *RI = TM.getRegisterInfo(); + for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) { + if (const char *Name = RI->get(i).Name) + if (StringsEqualNoCase(Constraint, Name)) + return std::vector<unsigned>(1, i); + } + + // Not a physreg, must not be a register reference or something. + return std::vector<unsigned>(); +} + _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits