Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.77 -> 1.78 X86ISelLowering.h updated: 1.24 -> 1.25 X86InstrInfo.td updated: 1.228 -> 1.229 --- Log message: Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a flag so it can be flagged to a FST. --- Diffs of the changes: (+15 -8) X86ISelLowering.cpp | 8 +++++--- X86ISelLowering.h | 10 ++++++---- X86InstrInfo.td | 5 ++++- 3 files changed, 15 insertions(+), 8 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.77 llvm/lib/Target/X86/X86ISelLowering.cpp:1.78 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.77 Wed Feb 1 18:28:23 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Feb 3 20:20:30 2006 @@ -1476,18 +1476,19 @@ std::vector<MVT::ValueType> Tys; Tys.push_back(MVT::f64); Tys.push_back(MVT::Other); - Tys.push_back(MVT::Flag); + if (X86ScalarSSE) Tys.push_back(MVT::Flag); std::vector<SDOperand> Ops; Ops.push_back(Chain); Ops.push_back(StackSlot); Ops.push_back(DAG.getValueType(SrcVT)); - Result = DAG.getNode(X86ISD::FILD, Tys, Ops); + Result = DAG.getNode(X86ScalarSSE ? X86ISD::FILD_FLAG :X86ISD::FILD, + Tys, Ops); if (X86ScalarSSE) { Chain = Result.getValue(1); SDOperand InFlag = Result.getValue(2); - // FIXME: Currently the FST is flagged to the FILD. This + // FIXME: Currently the FST is flagged to the FILD_FLAG. This // shouldn't be necessary except that RFP cannot be live across // multiple blocks. When stackifier is fixed, they can be uncoupled. MachineFunction &MF = DAG.getMachineFunction(); @@ -1974,6 +1975,7 @@ case X86ISD::FAND: return "X86ISD::FAND"; case X86ISD::FXOR: return "X86ISD::FXOR"; case X86ISD::FILD: return "X86ISD::FILD"; + case X86ISD::FILD_FLAG: return "X86ISD::FILD_FLAG"; case X86ISD::FP_TO_INT16_IN_MEM: return "X86ISD::FP_TO_INT16_IN_MEM"; case X86ISD::FP_TO_INT32_IN_MEM: return "X86ISD::FP_TO_INT32_IN_MEM"; case X86ISD::FP_TO_INT64_IN_MEM: return "X86ISD::FP_TO_INT64_IN_MEM"; Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.24 llvm/lib/Target/X86/X86ISelLowering.h:1.25 --- llvm/lib/Target/X86/X86ISelLowering.h:1.24 Tue Jan 31 16:28:30 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Fri Feb 3 20:20:30 2006 @@ -49,11 +49,13 @@ /// to X86::XORPS or X86::XORPD. FXOR, - /// FILD - This instruction implements SINT_TO_FP with the integer source - /// in memory and FP reg result. This corresponds to the X86::FILD*m - /// instructions. It has three inputs (token chain, address, and source - /// type) and three outputs (FP value, token chain, and a flag). + /// FILD, FILD_FLAG - This instruction implements SINT_TO_FP with the + /// integer source in memory and FP reg result. This corresponds to the + /// X86::FILD*m instructions. It has three inputs (token chain, address, + /// and source type) and two outputs (FP value and token chain). FILD_FLAG + /// also produces a flag). FILD, + FILD_FLAG, /// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the /// integer destination in memory and a FP reg source. This corresponds Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.228 llvm/lib/Target/X86/X86InstrInfo.td:1.229 --- llvm/lib/Target/X86/X86InstrInfo.td:1.228 Wed Feb 1 17:01:57 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Fri Feb 3 20:20:30 2006 @@ -108,6 +108,8 @@ def X86fst : SDNode<"X86ISD::FST", SDTX86Fst, [SDNPHasChain, SDNPInFlag]>; def X86fild : SDNode<"X86ISD::FILD", SDTX86Fild, + [SDNPHasChain]>; +def X86fildflag: SDNode<"X86ISD::FILD_FLAG",SDTX86Fild, [SDNPHasChain, SDNPOutFlag]>; def X86fp_to_i16mem : SDNode<"X86ISD::FP_TO_INT16_IN_MEM", SDTX86FpToIMem, [SDNPHasChain]>; @@ -3121,7 +3123,8 @@ def : Pat<(f64 fp64immneg1), (FpCHS (FpLD1))>, Requires<[FPStack]>; // Used to conv. i64 to f64 since there isn't a SSE version. -def : Pat<(X86fild addr:$src, i64), (FpILD64m addr:$src)>, Requires<[HasSSE2]>; +def : Pat<(X86fildflag addr:$src, i64), (FpILD64m addr:$src)>, + Requires<[HasSSE2]>; //===----------------------------------------------------------------------===// // Some peepholes _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits