Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.42 -> 1.43 --- Log message: This makes McCat/12-IOtest go 8x faster or so --- Diffs of the changes: (+14 -2) AlphaISelLowering.cpp | 16 ++++++++++++++-- 1 files changed, 14 insertions(+), 2 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.42 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.43 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.42 Sun Apr 2 15:13:57 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Sun Apr 2 16:08:39 2006 @@ -585,10 +585,22 @@ DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64)); } - case ISD::SDIV: - case ISD::UDIV: case ISD::UREM: case ISD::SREM: + //Expand only on constant case + if (Op.getOperand(1).getOpcode() == ISD::Constant) { + MVT::ValueType VT = Op.Val->getValueType(0); + unsigned Opc = Op.Val->getOpcode() == ISD::UREM ? ISD::UDIV : ISD::SDIV; + SDOperand Tmp1 = Op.Val->getOpcode() == ISD::UREM ? + BuildUDIVSequence(Op, &DAG) : + BuildSDIVSequence(Op, &DAG); + Tmp1 = DAG.getNode(ISD::MUL, VT, Tmp1, Op.getOperand(1)); + Tmp1 = DAG.getNode(ISD::SUB, VT, Op.getOperand(0), Tmp1); + return Tmp1; + } + //fall through + case ISD::SDIV: + case ISD::UDIV: if (MVT::isInteger(Op.getValueType())) { const char* opstr = 0; switch(Op.getOpcode()) { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits