Changes in directory llvm/lib/Target/Sparc:
SparcAsmPrinter.cpp updated: 1.62 -> 1.63 SparcRegisterInfo.cpp updated: 1.41 -> 1.42 --- Log message: There shalt be only one "immediate" operand type! --- Diffs of the changes: (+5 -7) SparcAsmPrinter.cpp | 6 ++---- SparcRegisterInfo.cpp | 6 +++--- 2 files changed, 5 insertions(+), 7 deletions(-) Index: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp diff -u llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.62 llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.63 --- llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.62 Wed May 3 20:15:02 2006 +++ llvm/lib/Target/Sparc/SparcAsmPrinter.cpp Thu May 4 12:21:19 2006 @@ -153,8 +153,7 @@ O << "%reg" << MO.getReg(); break; - case MachineOperand::MO_SignExtendedImmed: - case MachineOperand::MO_UnextendedImmed: + case MachineOperand::MO_Immediate: O << (int)MO.getImmedValue(); break; case MachineOperand::MO_MachineBasicBlock: @@ -192,8 +191,7 @@ if (OpTy == MachineOperand::MO_VirtualRegister && MI->getOperand(opNum+1).getReg() == SP::G0) return; // don't print "+%g0" - if ((OpTy == MachineOperand::MO_SignExtendedImmed || - OpTy == MachineOperand::MO_UnextendedImmed) && + if (OpTy == MachineOperand::MO_Immediate && MI->getOperand(opNum+1).getImmedValue() == 0) return; // don't print "+0" Index: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.41 llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.42 --- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.41 Fri Apr 7 11:34:45 2006 +++ llvm/lib/Target/Sparc/SparcRegisterInfo.cpp Thu May 4 12:21:19 2006 @@ -111,7 +111,7 @@ if (MI.getOpcode() == SP::ADJCALLSTACKDOWN) Size = -Size; if (Size) - BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addSImm(Size); + BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addImm(Size); MBB.erase(I); } @@ -136,7 +136,7 @@ // If the offset is small enough to fit in the immediate field, directly // encode it. MI.SetMachineOperandReg(i, SP::I6); - MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,Offset); + MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset); } else { // Otherwise, emit a G1 = SETHI %hi(offset). FIXME: it would be better to // scavenge a register here instead of reserving G1 all of the time. @@ -147,7 +147,7 @@ SP::G1).addReg(SP::G1).addReg(SP::I6); // Insert: G1+%lo(offset) into the user. MI.SetMachineOperandReg(i, SP::G1); - MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed, + MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset & ((1 << 10)-1)); } } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits