Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.239 -> 1.240
---
Log message:
Revert an un-intended change
---
Diffs of the changes: (+27 -16)
SelectionDAGISel.cpp | 43 +++++++++++++++++++++++++++----------------
1 files changed, 27 insertions(+), 16 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.239
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.240
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.239 Fri May 12
13:06:45 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat May 13 00:53:47 2006
@@ -58,28 +58,39 @@
static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0;
#endif
+// Scheduling heuristics
+enum SchedHeuristics {
+ defaultScheduling, // Let the target specify its preference.
+ noScheduling, // No scheduling, emit breadth first sequence.
+ simpleScheduling, // Two pass, min. critical path, max. utilization.
+ simpleNoItinScheduling, // Same as above exact using generic latency.
+ listSchedulingBURR, // Bottom-up reg reduction list scheduling.
+ listSchedulingTDRR, // Top-down reg reduction list scheduling.
+ listSchedulingTD // Top-down list scheduler.
+};
+
namespace {
- cl::opt<ScheduleDAG::SchedHeuristics>
+ cl::opt<SchedHeuristics>
ISHeuristic(
"sched",
cl::desc("Choose scheduling style"),
- cl::init(ScheduleDAG::defaultScheduling),
+ cl::init(defaultScheduling),
cl::values(
- clEnumValN(ScheduleDAG::defaultScheduling, "default",
+ clEnumValN(defaultScheduling, "default",
"Target preferred scheduling style"),
- clEnumValN(ScheduleDAG::noScheduling, "none",
+ clEnumValN(noScheduling, "none",
"No scheduling: breadth first sequencing"),
- clEnumValN(ScheduleDAG::simpleScheduling, "simple",
+ clEnumValN(simpleScheduling, "simple",
"Simple two pass scheduling: minimize critical path "
"and maximize processor utilization"),
- clEnumValN(ScheduleDAG::simpleNoItinScheduling, "simple-noitin",
+ clEnumValN(simpleNoItinScheduling, "simple-noitin",
"Simple two pass scheduling: Same as simple "
"except using generic latency"),
- clEnumValN(ScheduleDAG::listSchedulingBURR, "list-burr",
+ clEnumValN(listSchedulingBURR, "list-burr",
"Bottom-up register reduction list scheduling"),
- clEnumValN(ScheduleDAG::listSchedulingTDRR, "list-tdrr",
+ clEnumValN(listSchedulingTDRR, "list-tdrr",
"Top-down register reduction list scheduling"),
- clEnumValN(ScheduleDAG::listSchedulingTD, "list-td",
+ clEnumValN(listSchedulingTD, "list-td",
"Top-down list scheduler"),
clEnumValEnd));
} // namespace
@@ -3409,7 +3420,7 @@
switch (ISHeuristic) {
default: assert(0 && "Unrecognized scheduling heuristic");
- case ScheduleDAG::defaultScheduling:
+ case defaultScheduling:
if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency)
SL = createTDListDAGScheduler(DAG, BB, CreateTargetHazardRecognizer());
else {
@@ -3418,22 +3429,22 @@
SL = createBURRListDAGScheduler(DAG, BB);
}
break;
- case ScheduleDAG::noScheduling:
+ case noScheduling:
SL = createBFS_DAGScheduler(DAG, BB);
break;
- case ScheduleDAG::simpleScheduling:
+ case simpleScheduling:
SL = createSimpleDAGScheduler(false, DAG, BB);
break;
- case ScheduleDAG::simpleNoItinScheduling:
+ case simpleNoItinScheduling:
SL = createSimpleDAGScheduler(true, DAG, BB);
break;
- case ScheduleDAG::listSchedulingBURR:
+ case listSchedulingBURR:
SL = createBURRListDAGScheduler(DAG, BB);
break;
- case ScheduleDAG::listSchedulingTDRR:
+ case listSchedulingTDRR:
SL = createTDRRListDAGScheduler(DAG, BB);
break;
- case ScheduleDAG::listSchedulingTD:
+ case listSchedulingTD:
SL = createTDListDAGScheduler(DAG, BB, CreateTargetHazardRecognizer());
break;
}
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