Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.244 -> 1.245 --- Log message: Eliminate use of getNode that takes a vector. --- Diffs of the changes: (+21 -11) X86ISelLowering.cpp | 32 +++++++++++++++++++++----------- 1 files changed, 21 insertions(+), 11 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.244 llvm/lib/Target/X86/X86ISelLowering.cpp:1.245 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.244 Fri Aug 11 04:05:03 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Aug 11 12:38:39 2006 @@ -2365,7 +2365,8 @@ MaskVec.push_back(DAG.getConstant(1-i+NumElems, EVT)); else MaskVec.push_back(DAG.getConstant(i+NumElems, EVT)); - SDOperand ShufMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, MaskVec); + SDOperand ShufMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &MaskVec[0], MaskVec.size()); return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[0], V[1], ShufMask); } @@ -2501,14 +2502,15 @@ MaskVec.push_back(PermMask.getOperand(i)); for (unsigned i = 4; i != 8; ++i) MaskVec.push_back(DAG.getConstant(i, BaseVT)); - SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, MaskVec); + SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &MaskVec[0], MaskVec.size()); V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); MaskVec.clear(); for (unsigned i = 0; i != 4; ++i) MaskVec.push_back(DAG.getConstant(i, BaseVT)); for (unsigned i = 4; i != 8; ++i) MaskVec.push_back(PermMask.getOperand(i)); - Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, MaskVec); + Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0],MaskVec.size()); return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); } } else { @@ -2558,7 +2560,8 @@ } if (NumLo <= 2 && NumHi <= 2) { V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, Mask1)); + DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &Mask1[0], Mask1.size())); for (unsigned i = 0; i != NumElems; ++i) { if (Locs[i].first == -1) continue; @@ -2570,7 +2573,8 @@ } return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V1, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, Mask2)); + DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &Mask2[0], Mask2.size())); } // Break it into (shuffle shuffle_hi, shuffle_lo). @@ -2604,10 +2608,12 @@ SDOperand LoShuffle = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, LoMask)); + DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &LoMask[0], LoMask.size())); SDOperand HiShuffle = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, HiMask)); + DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &HiMask[0], HiMask.size())); std::vector<SDOperand> MaskOps; for (unsigned i = 0; i != NumElems; ++i) { if (Locs[i].first == -1) { @@ -2618,7 +2624,8 @@ } } return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, LoShuffle, HiShuffle, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, MaskOps)); + DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &MaskOps[0], MaskOps.size())); } return SDOperand(); @@ -2651,7 +2658,8 @@ IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); - SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, IdxVec); + SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &IdxVec[0], IdxVec.size()); Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(), Vec, Vec, Mask); return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec, @@ -2669,7 +2677,8 @@ std::vector<SDOperand> IdxVec; IdxVec.push_back(DAG.getConstant(1, MVT::getVectorBaseType(MaskVT))); IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); - SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, IdxVec); + SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &IdxVec[0], IdxVec.size()); Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(), Vec, DAG.getNode(ISD::UNDEF, Vec.getValueType()), Mask); return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec, @@ -2706,7 +2715,8 @@ for (unsigned i = 1; i <= 3; ++i) MaskVec.push_back(DAG.getConstant(i, BaseVT)); return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, N0, N1, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, MaskVec)); + DAG.getNode(ISD::BUILD_VECTOR, MaskVT, + &MaskVec[0], MaskVec.size())); } else { // Use two pinsrw instructions to insert a 32 bit value. Idx <<= 1; _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits