Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.139 -> 1.140 SelectionDAGNodes.h updated: 1.155 -> 1.156 --- Log message: Indexed load / store changes. --- Diffs of the changes: (+18 -18) SelectionDAG.h | 3 ++- SelectionDAGNodes.h | 33 ++++++++++++++++----------------- 2 files changed, 18 insertions(+), 18 deletions(-) Index: llvm/include/llvm/CodeGen/SelectionDAG.h diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.139 llvm/include/llvm/CodeGen/SelectionDAG.h:1.140 --- llvm/include/llvm/CodeGen/SelectionDAG.h:1.139 Tue Oct 17 16:12:56 2006 +++ llvm/include/llvm/CodeGen/SelectionDAG.h Thu Oct 26 16:52:23 2006 @@ -314,7 +314,8 @@ SDOperand getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, const Value *SV, int SVOffset, MVT::ValueType EVT, bool isVolatile=false); - SDOperand getPreIndexedLoad(SDOperand OrigLoad, SDOperand Base); + SDOperand getIndexedLoad(SDOperand OrigLoad, SDOperand Base, + SDOperand Offset, ISD::MemOpAddrMode AM); SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain, SDOperand Ptr, SDOperand SV); Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.155 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.156 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.155 Tue Oct 17 16:12:56 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Oct 26 16:52:24 2006 @@ -370,9 +370,10 @@ // operations. FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, - // Other operators. LOAD and STORE have token chains as their first - // operand, then the same operands as an LLVM load/store instruction, then a - // SRCVALUE node that provides alias analysis information. + // LOAD and STORE have token chains as their first operand, then the same + // operands as an LLVM load/store instruction, then an offset node that + // is added / subtracted from the base pointer to form the address (for + // indexed memory ops). LOAD, STORE, // Abstract vector version of LOAD. VLOAD has a constant element count as @@ -529,8 +530,8 @@ /// load); an unindexed store does not produces a value. /// /// PRE_INC Similar to the unindexed mode where the effective address is - /// PRE_DEC the result of computation of the base pointer. However, it - /// considers the computation as being folded into the load / + /// PRE_DEC the value of the base pointer add / subtract the offset. + /// It considers the computation as being folded into the load / /// store operation (i.e. the load / store does the address /// computation as well as performing the memory transaction). /// The base operand is always undefined. In addition to @@ -540,12 +541,12 @@ /// of the address computation). /// /// POST_INC The effective address is the value of the base pointer. The - /// POST_DEC value of the offset operand is then added to the base after - /// memory transaction. In addition to producing a chain, - /// post-indexed load produces two values (the result of the load - /// and the result of the base + offset computation); a - /// post-indexed store produces one value (the the result of the - /// base + offset computation). + /// POST_DEC value of the offset operand is then added to / subtracted + /// from the base after memory transaction. In addition to + /// producing a chain, post-indexed load produces two values + /// (the result of the load and the result of the base +/- offset + /// computation); a post-indexed store produces one value (the + /// the result of the base +/- offset computation). /// enum MemOpAddrMode { UNINDEXED = 0, @@ -1408,9 +1409,8 @@ : SDNode(ISD::LOAD, Chain, Ptr, Off), AddrMode(AM), ExtType(ETy), LoadedVT(LVT), SrcValue(SV), SVOffset(O), Alignment(Align), IsVolatile(Vol) { - assert((Off.getOpcode() == ISD::UNDEF || - AddrMode == ISD::POST_INC || AddrMode == ISD::POST_DEC) && - "Only post-indexed load has a non-undef offset operand"); + assert((Off.getOpcode() == ISD::UNDEF || AddrMode != ISD::UNINDEXED) && + "Only indexed load has a non-undef offset operand"); } public: @@ -1462,9 +1462,8 @@ : SDNode(ISD::STORE, Chain, Value, Ptr, Off), AddrMode(AM), IsTruncStore(isTrunc), StoredVT(SVT), SrcValue(SV), SVOffset(O), Alignment(Align), IsVolatile(Vol) { - assert((Off.getOpcode() == ISD::UNDEF || - AddrMode == ISD::POST_INC || AddrMode == ISD::POST_DEC) && - "Only post-indexed store has a non-undef offset operand"); + assert((Off.getOpcode() == ISD::UNDEF || AddrMode != ISD::UNINDEXED) && + "Only indexed store has a non-undef offset operand"); } public: _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits