This patch is for llvm-gcc to make it emit ashr (arithmetic shift right)
and lshr (logical shift right) instructions. It needs to be applied to
llvm-gcc after the SHR.patch is applied to LLVM.
Reid.
Index: gcc/llvm-convert.cpp
===================================================================
--- gcc/llvm-convert.cpp (revision 193)
+++ gcc/llvm-convert.cpp (working copy)
@@ -565,12 +565,19 @@
case TRUTH_AND_EXPR: Result = EmitTruthOp(exp, Instruction::And); break;
case TRUTH_OR_EXPR: Result = EmitTruthOp(exp, Instruction::Or); break;
case TRUTH_XOR_EXPR: Result = EmitTruthOp(exp, Instruction::Xor); break;
- case RSHIFT_EXPR: Result = EmitShiftOp(exp,DestLoc,Instruction::Shr);break;
+ case RSHIFT_EXPR:
+ Result = EmitShiftOp(exp,DestLoc,
+ TYPE_UNSIGNED(TREE_TYPE(exp)) ? Instruction::LShr : Instruction::AShr);
+ break;
case LSHIFT_EXPR: Result = EmitShiftOp(exp,DestLoc,Instruction::Shl);break;
- case RROTATE_EXPR: Result = EmitRotateOp(exp, Instruction::Shr,
- Instruction::Shl); break;
- case LROTATE_EXPR: Result = EmitRotateOp(exp, Instruction::Shl,
- Instruction::Shr); break;
+ case RROTATE_EXPR:
+ Result = EmitRotateOp(exp,
+ TYPE_UNSIGNED(TREE_TYPE(exp)) ? Instruction::LShr : Instruction::AShr,
+ Instruction::Shl);
+ break;
+ case LROTATE_EXPR:
+ Result = EmitRotateOp(exp, Instruction::Shl, Instruction::LShr);
+ break;
case MIN_EXPR: Result = EmitMinMaxExpr(exp, Instruction::SetLE); break;
case MAX_EXPR: Result = EmitMinMaxExpr(exp, Instruction::SetGE); break;
case CONSTRUCTOR: Result = EmitCONSTRUCTOR(exp, DestLoc); break;
@@ -1718,7 +1725,8 @@
}
Value *ShAmt = ConstantInt::get(Type::UByteTy, ValSizeInBits-LV.BitSize);
- Val = new ShiftInst(Instruction::Shr, Val, ShAmt, "tmp", CurBB);
+ Val = new ShiftInst(Val->getType()->isSigned() ?
+ Instruction::AShr : Instruction::LShr, Val, ShAmt, "tmp", CurBB);
}
return CastToType(Val, ConvertType(TREE_TYPE(exp)));
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