[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp AlphaInstrInfo.td

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaISelLowering.cpp updated: 1.71 -> 1.72
AlphaInstrInfo.td updated: 1.133 -> 1.134
---
Log message:

fix 2006-11-01-vastart.ll

---
Diffs of the changes:  (+5 -3)

 AlphaISelLowering.cpp |    2 +-
 AlphaInstrInfo.td     |    6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.71 
llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.72
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.71    Tue Oct 31 10:49:55 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Wed Nov  1 21:05:26 2006
@@ -565,7 +565,7 @@
   case ISD::VASTART: {
     SDOperand Chain = Op.getOperand(0);
     SDOperand VAListP = Op.getOperand(1);
-    SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(3));
+    SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2));
     
     // vastart stores the address of the VarArgsBase and VarArgsOffset
     SDOperand FR  = DAG.getFrameIndex(VarArgsBase, MVT::i64);


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.133 
llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.134
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.133       Tue Oct 31 17:46:56 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td     Wed Nov  1 21:05:26 2006
@@ -404,6 +404,7 @@
 
 def JSR_COROUTINE : MbrForm< 0x1A, 0x03, (ops GPRC:$RD, GPRC:$RS, 
s14imm:$DISP), "jsr_coroutine $RD,($RS),$DISP", s_jsr>; //Jump to subroutine 
return
 
+
 let OperandList = (ops GPRC:$RA, s64imm:$DISP, GPRC:$RB) in {
 def LDQ   : MForm<0x29, 0, 1, "ldq $RA,$DISP($RB)",
                  [(set GPRC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], 
s_ild>;
@@ -421,6 +422,8 @@
                  [(set GPRC:$RA, (zextloadi16 (add GPRC:$RB, 
immSExt16:$DISP)))], s_ild>;
 def LDWUr : MForm<0x0C, 0, 1, "ldwu $RA,$DISP($RB)\t\t!gprellow",
                  [(set GPRC:$RA, (zextloadi16 (Alpha_gprello 
tglobaladdr:$DISP, GPRC:$RB)))], s_ild>;
+
+
 def STB   : MForm<0x0E, 1, 0, "stb $RA,$DISP($RB)",
                 [(truncstorei8 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], 
s_ist>;
 def STBr  : MForm<0x0E, 1, 0, "stb $RA,$DISP($RB)\t\t!gprellow",
@@ -649,6 +652,7 @@
 
 //misc FP selects
 //Select double
+     
 def : Pat<(select (seteq F8RC:$RA, F8RC:$RB), F8RC:$st, F8RC:$sf),
       (FCMOVNET F8RC:$sf, F8RC:$st, (CMPTEQ F8RC:$RA, F8RC:$RB))>;
 def : Pat<(select (setoeq F8RC:$RA, F8RC:$RB), F8RC:$st, F8RC:$sf),
@@ -976,8 +980,6 @@
 //def UNPKBW : OForm< 0x1C, 0x34, "UNPKBW $RA,$RB,$RC">; //Unpack bytes to 
words
 //CVTLQ F-P 17.010 Convert longword to quadword
 //CVTQL F-P 17.030 Convert quadword to longword
-//def AMASK    : OForm< 0x11, 0x61, "AMASK $RA,$RB,$RC", []>; //Architecture 
mask
-//def AMASKi   : OFormL<0x11, 0x61, "AMASK $RA,$L,$RC", []>; //Architecture 
mask
 
 
 //Constant handling



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