Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.192 -> 1.193 MachineInstrBuilder.h updated: 1.37 -> 1.38 --- Log message: Add implicit def / use operands to MachineInstr. --- Diffs of the changes: (+20 -6) MachineInstr.h | 21 +++++++++++++++++---- MachineInstrBuilder.h | 5 +++-- 2 files changed, 20 insertions(+), 6 deletions(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.192 llvm/include/llvm/CodeGen/MachineInstr.h:1.193 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.192 Sat Oct 28 13:18:36 2006 +++ llvm/include/llvm/CodeGen/MachineInstr.h Fri Nov 10 02:32:14 2006 @@ -60,6 +60,7 @@ MachineOperandType opType:8; // Discriminate the union. bool IsDef : 1; // True if this is a def, false if this is a use. + bool IsImp : 1; // True if this is an implicit def or use. /// offset - Offset to address of global or external, only valid for /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex @@ -78,6 +79,7 @@ Op.opType = MachineOperand::MO_Immediate; Op.contents.immedVal = Val; Op.IsDef = false; + Op.IsImp = false; Op.offset = 0; return Op; } @@ -85,6 +87,7 @@ const MachineOperand &operator=(const MachineOperand &MO) { contents = MO.contents; IsDef = MO.IsDef; + IsImp = MO.IsImp; opType = MO.opType; offset = MO.offset; return *this; @@ -173,6 +176,15 @@ IsDef = true; } + bool isImplicit() const { + assert(isRegister() && "Wrong MachineOperand accessor"); + return IsImp; + } + bool setImplicit() { + assert(isRegister() && "Wrong MachineOperand accessor"); + IsImp = true; + } + /// getReg - Returns the register number. /// unsigned getReg() const { @@ -330,10 +342,11 @@ /// addRegOperand - Add a register operand. /// - void addRegOperand(unsigned Reg, bool IsDef) { - MachineOperand &Op = AddNewOperand(); + void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false) { + MachineOperand &Op = AddNewOperand(IsImp); Op.opType = MachineOperand::MO_Register; Op.IsDef = IsDef; + Op.IsImp = IsImp; Op.contents.RegNo = Reg; Op.offset = 0; } @@ -415,8 +428,8 @@ Operands.erase(Operands.begin()+i); } private: - MachineOperand &AddNewOperand() { - assert(!OperandsComplete() && + MachineOperand &AddNewOperand(bool IsImp = false) { + assert((IsImp || !OperandsComplete()) && "Trying to add an operand to a machine instr that is already done!"); Operands.push_back(MachineOperand()); return Operands.back(); Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.37 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.38 --- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.37 Mon Sep 4 21:31:13 2006 +++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Fri Nov 10 02:32:14 2006 @@ -33,8 +33,9 @@ /// addReg - Add a new virtual register operand... /// - const MachineInstrBuilder &addReg(int RegNo, bool isDef = false) const { - MI->addRegOperand(RegNo, isDef); + const MachineInstrBuilder &addReg(int RegNo, bool isDef = false, + bool isImp = false) const { + MI->addRegOperand(RegNo, isDef, isImp); return *this; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits