Changes in directory llvm/lib/Target/Alpha:
AlphaInstrInfo.cpp updated: 1.13 -> 1.14 AlphaRegisterInfo.cpp updated: 1.50 -> 1.51 AlphaRegisterInfo.h updated: 1.13 -> 1.14 --- Log message: Matches MachineInstr changes. --- Diffs of the changes: (+13 -9) AlphaInstrInfo.cpp | 3 ++- AlphaRegisterInfo.cpp | 15 ++++++++------- AlphaRegisterInfo.h | 4 +++- 3 files changed, 13 insertions(+), 9 deletions(-) Index: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.13 llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.14 --- llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.13 Tue Oct 31 17:46:56 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.cpp Mon Nov 13 17:36:35 2006 @@ -19,7 +19,8 @@ using namespace llvm; AlphaInstrInfo::AlphaInstrInfo() - : TargetInstrInfo(AlphaInsts, sizeof(AlphaInsts)/sizeof(AlphaInsts[0])) { } + : TargetInstrInfo(AlphaInsts, sizeof(AlphaInsts)/sizeof(AlphaInsts[0])), + RI(*this) { } bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI, Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.50 llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.51 --- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.50 Thu Nov 2 19:18:29 2006 +++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Mon Nov 13 17:36:35 2006 @@ -51,8 +51,9 @@ return l - h * IMM_MULT; } -AlphaRegisterInfo::AlphaRegisterInfo() - : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP) +AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii) + : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP), + TII(tii) { } @@ -114,13 +115,13 @@ unsigned InReg = MI->getOperand(1).getReg(); Opc = (Opc == Alpha::BISr) ? Alpha::STQ : ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); - return BuildMI(Opc, 3).addReg(InReg).addFrameIndex(FrameIndex) + return BuildMI(TII, Opc, 3).addReg(InReg).addFrameIndex(FrameIndex) .addReg(Alpha::F31); } else { // load -> move unsigned OutReg = MI->getOperand(0).getReg(); Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); - return BuildMI(Opc, 2, OutReg).addFrameIndex(FrameIndex) + return BuildMI(TII, Opc, 2, OutReg).addFrameIndex(FrameIndex) .addReg(Alpha::F31); } } @@ -205,11 +206,11 @@ MachineInstr *New; if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) { - New=BuildMI(Alpha::LDA, 2, Alpha::R30) + New=BuildMI(TII, Alpha::LDA, 2, Alpha::R30) .addImm(-Amount).addReg(Alpha::R30); } else { assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP); - New=BuildMI(Alpha::LDA, 2, Alpha::R30) + New=BuildMI(TII, Alpha::LDA, 2, Alpha::R30) .addImm(Amount).addReg(Alpha::R30); } @@ -266,7 +267,7 @@ MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false); MI.getOperand(i).ChangeToImmediate(getLower16(Offset)); //insert the new - MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28) + MachineInstr* nMI=BuildMI(TII, Alpha::LDAH, 2, Alpha::R28) .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30); MBB.insert(II, nMI); } else { Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.h diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.13 llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.14 --- llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.13 Wed May 17 19:11:53 2006 +++ llvm/lib/Target/Alpha/AlphaRegisterInfo.h Mon Nov 13 17:36:35 2006 @@ -22,7 +22,9 @@ class Type; struct AlphaRegisterInfo : public AlphaGenRegisterInfo { - AlphaRegisterInfo(); + const TargetInstrInfo &TII; + + AlphaRegisterInfo(const TargetInstrInfo &tii); /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits