Changes in directory llvm/lib/Target/X86:
X86InstrInfo.cpp updated: 1.72 -> 1.73 X86RegisterInfo.cpp updated: 1.177 -> 1.178 --- Log message: Properly transfer kill / dead info. --- Diffs of the changes: (+41 -21) X86InstrInfo.cpp | 41 +++++++++++++++++++++++++++-------------- X86RegisterInfo.cpp | 21 ++++++++++++++------- 2 files changed, 41 insertions(+), 21 deletions(-) Index: llvm/lib/Target/X86/X86InstrInfo.cpp diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.72 llvm/lib/Target/X86/X86InstrInfo.cpp:1.73 --- llvm/lib/Target/X86/X86InstrInfo.cpp:1.72 Mon Nov 13 17:36:35 2006 +++ llvm/lib/Target/X86/X86InstrInfo.cpp Wed Nov 15 14:58:11 2006 @@ -130,6 +130,7 @@ unsigned Dest = MI->getOperand(0).getReg(); unsigned Src = MI->getOperand(1).getReg(); + MachineInstr *NewMI = NULL; switch (MI->getOpcode()) { default: break; case X86::SHUFPSrri: { @@ -140,7 +141,9 @@ unsigned C = MI->getOperand(2).getReg(); unsigned M = MI->getOperand(3).getImmedValue(); if (!Subtarget->hasSSE2() || B != C) return 0; - return BuildMI(*this, X86::PSHUFDri, 2, A).addReg(B).addImm(M); + NewMI = BuildMI(*this, X86::PSHUFDri, 2, A).addReg(B).addImm(M); + NewMI->copyKillDeadInfo(MI); + return NewMI; } } @@ -157,46 +160,51 @@ case X86::INC32r: case X86::INC64_32r: assert(MI->getNumOperands() == 2 && "Unknown inc instruction!"); - return addRegOffset(BuildMI(*this, X86::LEA32r, 5, Dest), Src, 1); + NewMI = addRegOffset(BuildMI(*this, X86::LEA32r, 5, Dest), Src, 1); + break; case X86::INC16r: case X86::INC64_16r: if (DisableLEA16) return 0; assert(MI->getNumOperands() == 2 && "Unknown inc instruction!"); - return addRegOffset(BuildMI(*this, X86::LEA16r, 5, Dest), Src, 1); + NewMI = addRegOffset(BuildMI(*this, X86::LEA16r, 5, Dest), Src, 1); + break; case X86::DEC32r: case X86::DEC64_32r: assert(MI->getNumOperands() == 2 && "Unknown dec instruction!"); - return addRegOffset(BuildMI(*this, X86::LEA32r, 5, Dest), Src, -1); + NewMI = addRegOffset(BuildMI(*this, X86::LEA32r, 5, Dest), Src, -1); + break; case X86::DEC16r: case X86::DEC64_16r: if (DisableLEA16) return 0; assert(MI->getNumOperands() == 2 && "Unknown dec instruction!"); - return addRegOffset(BuildMI(*this, X86::LEA16r, 5, Dest), Src, -1); + NewMI = addRegOffset(BuildMI(*this, X86::LEA16r, 5, Dest), Src, -1); + break; case X86::ADD32rr: assert(MI->getNumOperands() == 3 && "Unknown add instruction!"); - return addRegReg(BuildMI(*this, X86::LEA32r, 5, Dest), Src, + NewMI = addRegReg(BuildMI(*this, X86::LEA32r, 5, Dest), Src, MI->getOperand(2).getReg()); + break; case X86::ADD16rr: if (DisableLEA16) return 0; assert(MI->getNumOperands() == 3 && "Unknown add instruction!"); - return addRegReg(BuildMI(*this, X86::LEA16r, 5, Dest), Src, + NewMI = addRegReg(BuildMI(*this, X86::LEA16r, 5, Dest), Src, MI->getOperand(2).getReg()); + break; case X86::ADD32ri: case X86::ADD32ri8: assert(MI->getNumOperands() == 3 && "Unknown add instruction!"); if (MI->getOperand(2).isImmediate()) - return addRegOffset(BuildMI(*this, X86::LEA32r, 5, Dest), Src, + NewMI = addRegOffset(BuildMI(*this, X86::LEA32r, 5, Dest), Src, MI->getOperand(2).getImmedValue()); - return 0; + break; case X86::ADD16ri: case X86::ADD16ri8: if (DisableLEA16) return 0; assert(MI->getNumOperands() == 3 && "Unknown add instruction!"); if (MI->getOperand(2).isImmediate()) - return addRegOffset(BuildMI(*this, X86::LEA16r, 5, Dest), Src, + NewMI = addRegOffset(BuildMI(*this, X86::LEA16r, 5, Dest), Src, MI->getOperand(2).getImmedValue()); break; - case X86::SHL16ri: if (DisableLEA16) return 0; case X86::SHL32ri: @@ -208,12 +216,14 @@ AM.Scale = 1 << ShAmt; AM.IndexReg = Src; unsigned Opc = MI->getOpcode() == X86::SHL32ri ? X86::LEA32r :X86::LEA16r; - return addFullAddress(BuildMI(*this, Opc, 5, Dest), AM); + NewMI = addFullAddress(BuildMI(*this, Opc, 5, Dest), AM); } break; } - return 0; + if (NewMI) + NewMI->copyKillDeadInfo(MI); + return NewMI; } /// commuteInstruction - We have a few instructions that must be hacked on to @@ -239,7 +249,10 @@ unsigned A = MI->getOperand(0).getReg(); unsigned B = MI->getOperand(1).getReg(); unsigned C = MI->getOperand(2).getReg(); - return BuildMI(*this, Opc, 3, A).addReg(C).addReg(B).addImm(Size-Amt); + bool BisKill = MI->getOperand(1).isKill(); + bool CisKill = MI->getOperand(2).isKill(); + return BuildMI(*this, Opc, 3, A).addReg(C, false, false, CisKill) + .addReg(B, false, false, BisKill).addImm(Size-Amt); } default: return TargetInstrInfo::commuteInstruction(MI); Index: llvm/lib/Target/X86/X86RegisterInfo.cpp diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.177 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.178 --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.177 Mon Nov 13 17:36:35 2006 +++ llvm/lib/Target/X86/X86RegisterInfo.cpp Wed Nov 15 14:58:11 2006 @@ -291,6 +291,7 @@ bool isTwoAddr = NumOps > 1 && TII.getOperandConstraint(MI->getOpcode(), 1,TargetInstrInfo::TIED_TO) != -1; + MachineInstr *NewMI = NULL; // Folding a memory location into the two-address part of a two-address // instruction is different than folding it other places. It requires // replacing the *two* registers with the memory location. @@ -465,13 +466,17 @@ isTwoAddrFold = true; } else if (i == 0) { // If operand 0 if (MI->getOpcode() == X86::MOV16r0) - return MakeM0Inst(TII, X86::MOV16mi, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV16mi, FrameIndex, MI); else if (MI->getOpcode() == X86::MOV32r0) - return MakeM0Inst(TII, X86::MOV32mi, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV32mi, FrameIndex, MI); else if (MI->getOpcode() == X86::MOV64r0) - return MakeM0Inst(TII, X86::MOV64mi32, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV64mi32, FrameIndex, MI); else if (MI->getOpcode() == X86::MOV8r0) - return MakeM0Inst(TII, X86::MOV8mi, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV8mi, FrameIndex, MI); + if (NewMI) { + NewMI->copyKillDeadInfo(MI); + return NewMI; + } static const TableEntry OpcodeTable[] = { { X86::CMP16ri, X86::CMP16mi }, @@ -828,9 +833,11 @@ if (const TableEntry *Entry = TableLookup(OpcodeTablePtr, OpcodeTableSize, fromOpcode)) { if (isTwoAddrFold) - return FuseTwoAddrInst(Entry->to, FrameIndex, MI, TII); - - return FuseInst(Entry->to, i, FrameIndex, MI, TII); + NewMI = FuseTwoAddrInst(Entry->to, FrameIndex, MI, TII); + else + NewMI = FuseInst(Entry->to, i, FrameIndex, MI, TII); + NewMI->copyKillDeadInfo(MI); + return NewMI; } } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits