Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.254 -> 1.255 --- Log message: For better or worse, load from i1 is assumed to be zero extended. Do not form a load from i1 from larger loads that may not be zext'd. --- Diffs of the changes: (+6 -1) DAGCombiner.cpp | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.254 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.255 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.254 Mon Nov 20 12:05:46 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Nov 26 22:40:53 2006 @@ -2192,7 +2192,12 @@ return N0.getOperand(0); } // fold (truncate (load x)) -> (smaller load x) - if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse()) { + if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && + // Do not allow folding to i1 here. i1 is implicitly stored in memory in + // zero extended form: by shrinking the load, we lose track of the fact + // that it is already zero extended. + // FIXME: This should be reevaluated. + VT != MVT::i1) { assert(MVT::getSizeInBits(N0.getValueType()) > MVT::getSizeInBits(VT) && "Cannot truncate to larger type!"); LoadSDNode *LN0 = cast<LoadSDNode>(N0); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits