Changes in directory llvm/lib/Transforms/Scalar:
LoopStrengthReduce.cpp updated: 1.104 -> 1.105 --- Log message: For PR1097: http://llvm.org/PR1097 : Enable complex addressing modes on 64-bit platforms involving two induction variables by keeping a size and scale in 64-bits not 32. Patch by Dan Gohman. --- Diffs of the changes: (+1 -1) LoopStrengthReduce.cpp | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.104 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.105 --- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.104 Fri Jan 5 19:37:35 2007 +++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Mon Jan 8 10:17:51 2007 @@ -893,7 +893,7 @@ if (unsigned(abs(SInt)) < Scale || (SInt % Scale) != 0) continue; std::map<SCEVHandle, IVsOfOneStride>::iterator SI = - IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, Type::Int32Ty)); + IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, UIntPtrTy)); if (SI == IVsByStride.end()) continue; for (std::vector<IVExpr>::iterator II = SI->second.IVs.begin(), _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits