> Support to provide exception and selector registers.
Hey Jim,
This behavior:
> +/// LowerEXCEPTIONADDR - Replace EXCEPTIONADDR with a copy from
> the exception
> +/// register. The register was made live in the ISel.
> +static SDOperand LowerEXCEPTIONADDR(SDOperand Op, SelectionDAG
> &DAG) {
> + const MRegisterInfo *MRI = DAG.getTargetLoweringInfo().
> + getTargetMachine().
> + getRegisterInfo();
> + MVT::ValueType VT = Op.Val->getValueType(0);
> + unsigned Reg = MRI->getEHExceptionRegister();
> + SDOperand Result = DAG.getCopyFromReg(Op.getOperand(0), Reg, VT);
> + return Result.getValue(Op.ResNo);
> +}
Is almost certainly guaranteed to work for other targets as well (not
just PPC). Can you change this code so that Legalize has this code,
and invokes it when the target requests that "EXCEPTIONADDR" be
expanded?
Right now, all non-ppc targets abort when this happens, which isn't
very nice. Please just have them lower to returning something stupid
but that will compile correctly (like return a constant zero) if MRI-
>getEHExceptionRegister() returns 0.
With these changes, you should be able to remove the code you added
to each target.
-Chris
> +
> +/// LowerEXCEPTIONADDR - Replace EHSELECTION with a copy from the
> exception
> +/// selection register. The register was made live in the ISel.
> +static SDOperand LowerEHSELECTION(SDOperand Op, SelectionDAG &DAG) {
> + const MRegisterInfo *MRI = DAG.getTargetLoweringInfo().
> + getTargetMachine().
> + getRegisterInfo();
> + MVT::ValueType VT = Op.Val->getValueType(0);
> + unsigned Reg = MRI->getEHHandlerRegister();
> + SDOperand Result = DAG.getCopyFromReg(Op.getOperand(1), Reg, VT);
> + return Result.getValue(Op.ResNo);
> +}
> +
> /// LowerOperation - Provide custom lowering hooks for some
> operations.
> ///
> SDOperand PPCTargetLowering::LowerOperation(SDOperand Op,
> SelectionDAG &DAG) {
> @@ -2647,6 +2671,10 @@
> // Frame & Return address. Currently unimplemented
> case ISD::RETURNADDR: break;
> case ISD::FRAMEADDR: break;
> +
> + // Exception address and exception selector.
> + case ISD::EXCEPTIONADDR: return LowerEXCEPTIONADDR(Op, DAG);
> + case ISD::EHSELECTION: return LowerEHSELECTION(Op, DAG);
> }
> return SDOperand();
> }
>
>
> Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
> diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.108 llvm/lib/
> Target/PowerPC/PPCRegisterInfo.cpp:1.109
> --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.108 Mon Feb 19
> 15:49:54 2007
> +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Wed Feb 21 16:54:50
> 2007
> @@ -1022,7 +1022,6 @@
>
> unsigned PPCRegisterInfo::getRARegister() const {
> return !Subtarget.isPPC64() ? PPC::LR : PPC::LR8;
> -
> }
>
> unsigned PPCRegisterInfo::getFrameRegister(MachineFunction &MF)
> const {
> @@ -1040,5 +1039,13 @@
> Moves.push_back(MachineMove(0, Dst, Src));
> }
>
> +unsigned PPCRegisterInfo::getEHExceptionRegister() const {
> + return !Subtarget.isPPC64() ? PPC::R3 : PPC::X3;
> +}
> +
> +unsigned PPCRegisterInfo::getEHHandlerRegister() const {
> + return !Subtarget.isPPC64() ? PPC::R4 : PPC::X4;
> +}
> +
> #include "PPCGenRegisterInfo.inc"
>
>
>
> Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
> diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.27 llvm/lib/
> Target/PowerPC/PPCRegisterInfo.h:1.28
> --- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.27 Mon Feb 19
> 15:49:54 2007
> +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Wed Feb 21 16:54:50 2007
> @@ -89,6 +89,10 @@
> unsigned getRARegister() const;
> unsigned getFrameRegister(MachineFunction &MF) const;
> void getInitialFrameState(std::vector<MachineMove> &Moves) const;
> +
> + // Exception handling queries.
> + unsigned getEHExceptionRegister() const;
> + unsigned getEHHandlerRegister() const;
> };
>
> } // end namespace llvm
>
>
>
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