Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.h updated: 1.60 -> 1.61 PPCISelLowering.cpp updated: 1.258 -> 1.259 --- Log message: Implemented the frameaddress intrinsic for PPC. --- Diffs of the changes: (+25 -1) PPCISelLowering.cpp | 24 +++++++++++++++++++++++- PPCISelLowering.h | 2 ++ 2 files changed, 25 insertions(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.60 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.61 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.60 Tue Feb 27 07:01:19 2007 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Thu Mar 1 07:11:38 2007 @@ -240,6 +240,8 @@ /// as the offset of the target addressing mode. virtual bool isLegalAddressImmediate(int64_t V) const; virtual bool isLegalAddressImmediate(llvm::GlobalValue*) const; + + SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG); }; } Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.258 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.259 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.258 Tue Feb 27 07:01:19 2007 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Mar 1 07:11:38 2007 @@ -2700,7 +2700,7 @@ // Frame & Return address. Currently unimplemented case ISD::RETURNADDR: break; - case ISD::FRAMEADDR: break; + case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); } return SDOperand(); } @@ -3171,3 +3171,25 @@ bool PPCTargetLowering::isLegalAddressImmediate(llvm::GlobalValue* GV) const { return TargetLowering::isLegalAddressImmediate(GV); } + +SDOperand PPCTargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG) +{ + // Depths > 0 not supported yet! + if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0) + return SDOperand(); + + MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); + bool isPPC64 = PtrVT == MVT::i64; + + MachineFunction &MF = DAG.getMachineFunction(); + MachineFrameInfo *MFI = MF.getFrameInfo(); + bool is31 = (NoFramePointerElim || MFI->hasVarSizedObjects()) + && MFI->getStackSize(); + + if (isPPC64) + return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::X31 : PPC::X1, + MVT::i32); + else + return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::R31 : PPC::R1, + MVT::i32); +} _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits