Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.483 -> 1.484 SelectionDAGISel.cpp updated: 1.381 -> 1.382 --- Log message: Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. --- Diffs of the changes: (+31 -31) LegalizeDAG.cpp | 11 ++++------- SelectionDAGISel.cpp | 51 +++++++++++++++++++++++++++------------------------ 2 files changed, 31 insertions(+), 31 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.483 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.484 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.483 Tue Mar 6 14:01:06 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Mar 7 10:25:08 2007 @@ -2242,8 +2242,7 @@ const char *FnName = 0; if (Node->getOpcode() == ISD::MEMSET) { - Entry.Node = Tmp2; Entry.isSigned = false; Entry.Ty = IntPtrTy; - Entry.isInReg = false; Entry.isSRet = false; + Entry.Node = Tmp2; Entry.Ty = IntPtrTy; Args.push_back(Entry); // Extend the (previously legalized) ubyte argument to be an int value // for the call. @@ -2251,17 +2250,15 @@ Tmp3 = DAG.getNode(ISD::TRUNCATE, MVT::i32, Tmp3); else Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3); - Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSigned = true; - Entry.isInReg = false; Entry.isSRet = false; + Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; Args.push_back(Entry); - Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSExt = false; Args.push_back(Entry); FnName = "memset"; } else if (Node->getOpcode() == ISD::MEMCPY || Node->getOpcode() == ISD::MEMMOVE) { Entry.Ty = IntPtrTy; - Entry.isSigned = false; Entry.isInReg = false; Entry.isSRet = false; Entry.Node = Tmp2; Args.push_back(Entry); Entry.Node = Tmp3; Args.push_back(Entry); Entry.Node = Tmp4; Args.push_back(Entry); @@ -4228,7 +4225,7 @@ MVT::ValueType ArgVT = Node->getOperand(i).getValueType(); const Type *ArgTy = MVT::getTypeForValueType(ArgVT); Entry.Node = Node->getOperand(i); Entry.Ty = ArgTy; - Entry.isSigned = isSigned; Entry.isInReg = false; Entry.isSRet = false; + Entry.isSExt = isSigned; Args.push_back(Entry); } SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy()); Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.381 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.382 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.381 Tue Mar 6 00:10:33 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Mar 7 10:25:08 2007 @@ -2279,7 +2279,8 @@ Value *Arg = I.getOperand(i); SDOperand ArgNode = getValue(Arg); Entry.Node = ArgNode; Entry.Ty = Arg->getType(); - Entry.isSigned = FTy->paramHasAttr(i, FunctionType::SExtAttribute); + Entry.isSExt = FTy->paramHasAttr(i, FunctionType::SExtAttribute); + Entry.isZExt = FTy->paramHasAttr(i, FunctionType::ZExtAttribute); Entry.isInReg = FTy->paramHasAttr(i, FunctionType::InRegAttribute); Entry.isSRet = FTy->paramHasAttr(i, FunctionType::StructRetAttribute); Args.push_back(Entry); @@ -2983,9 +2984,6 @@ TargetLowering::ArgListEntry Entry; Entry.Node = Src; Entry.Ty = TLI.getTargetData()->getIntPtrType(); - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Args.push_back(Entry); std::pair<SDOperand,SDOperand> Result = @@ -3001,9 +2999,6 @@ TargetLowering::ArgListEntry Entry; Entry.Node = getValue(I.getOperand(0)); Entry.Ty = TLI.getTargetData()->getIntPtrType(); - Entry.isSigned = false; - Entry.isInReg = false; - Entry.isSRet = false; Args.push_back(Entry); MVT::ValueType IntPtr = TLI.getPointerTy(); std::pair<SDOperand,SDOperand> Result = @@ -3099,21 +3094,21 @@ for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I, ++j) { MVT::ValueType VT = getValueType(I->getType()); - unsigned Flags = SDISelParamFlags::NoFlagSet; + unsigned Flags = ISD::ParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(I->getType()); // FIXME: Distinguish between a formal with no [sz]ext attribute from one // that is zero extended! if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute)) - Flags &= ~(SDISelParamFlags::Signed); + Flags &= ~(ISD::ParamFlags::SExt); if (FTy->paramHasAttr(j, FunctionType::SExtAttribute)) - Flags |= SDISelParamFlags::Signed; + Flags |= ISD::ParamFlags::SExt; if (FTy->paramHasAttr(j, FunctionType::InRegAttribute)) - Flags |= SDISelParamFlags::InReg; + Flags |= ISD::ParamFlags::InReg; if (FTy->paramHasAttr(j, FunctionType::StructRetAttribute)) - Flags |= SDISelParamFlags::StructReturn; - Flags |= (OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs); + Flags |= ISD::ParamFlags::StructReturn; + Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs); switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); @@ -3136,8 +3131,8 @@ RetVals.push_back(NVT); // if it isn't first piece, alignment must be 1 if (i > 0) - Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) | - (1 << SDISelParamFlags::OrigAlignmentOffs); + Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) | + (1 << ISD::ParamFlags::OrigAlignmentOffs); Ops.push_back(DAG.getConstant(Flags, MVT::i32)); } } else { @@ -3246,8 +3241,8 @@ if (TLI.getTypeAction(VT) != TargetLowering::Expand) { // if it isn't first piece, alignment must be 1 if (!isFirst) - Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) | - (1 << SDISelParamFlags::OrigAlignmentOffs); + Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) | + (1 << ISD::ParamFlags::OrigAlignmentOffs); Ops.push_back(Arg); Ops.push_back(DAG.getConstant(Flags, MVT::i32)); return; @@ -3294,17 +3289,19 @@ for (unsigned i = 0, e = Args.size(); i != e; ++i) { MVT::ValueType VT = getValueType(Args[i].Ty); SDOperand Op = Args[i].Node; - unsigned Flags = SDISelParamFlags::NoFlagSet; + unsigned Flags = ISD::ParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(Args[i].Ty); - if (Args[i].isSigned) - Flags |= SDISelParamFlags::Signed; + if (Args[i].isSExt) + Flags |= ISD::ParamFlags::SExt; + if (Args[i].isZExt) + Flags |= ISD::ParamFlags::ZExt; if (Args[i].isInReg) - Flags |= SDISelParamFlags::InReg; + Flags |= ISD::ParamFlags::InReg; if (Args[i].isSRet) - Flags |= SDISelParamFlags::StructReturn; - Flags |= OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs; + Flags |= ISD::ParamFlags::StructReturn; + Flags |= OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs; switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); @@ -3314,7 +3311,13 @@ break; case Promote: if (MVT::isInteger(VT)) { - unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; + unsigned ExtOp; + if (Args[i].isSExt) + ExtOp = ISD::SIGN_EXTEND; + else if (Args[i].isZExt) + ExtOp = ISD::ZERO_EXTEND; + else + ExtOp = ISD::ANY_EXTEND; Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op); } else { assert(MVT::isFloatingPoint(VT) && "Not int or FP?"); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits