Changes in directory llvm-www/ProjectsWithLLVM:
index.html updated: 1.32 -> 1.33 --- Log message: add fernando's project --- Diffs of the changes: (+49 -0) index.html | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 49 insertions(+) Index: llvm-www/ProjectsWithLLVM/index.html diff -u llvm-www/ProjectsWithLLVM/index.html:1.32 llvm-www/ProjectsWithLLVM/index.html:1.33 --- llvm-www/ProjectsWithLLVM/index.html:1.32 Sun Feb 4 23:47:58 2007 +++ llvm-www/ProjectsWithLLVM/index.html Mon Mar 26 13:46:43 2007 @@ -35,6 +35,7 @@ <div class="www_text"> <ul> +<li><a href="#ssa_ra">Improvements on SSA-Based Register Allocation</a></li> <li><a href="#LENS">LENS Project</a></li> <li><a href="#trident">Trident Compiler</a></li> <li><a href="#ascenium">Ascenium Reconfigurable Processor Compiler</a></li> @@ -54,6 +55,54 @@ </div> +<!--=========================================================================--> +<div class="www_subsection"> + <a name="ssa_ra">Improvements on SSA-Based Register Allocation.</a> +</div> + +<div class="www_subsubsection"> +By Fernando Pereira, UCLA. +</div> + +<div class="www_text"> +<p> +The register allocation problem has an exact polynomial solution when restricted +to programs in the Single Static Assignment (SSA) form. +Although striking, this major theoretical accomplishment has yet to be endorsed empirically. +This project consists in the implementation of a complete +SSA-based register allocator using the +<A href="http://llvm.org/" target="blank">LLVM</A> compiler framework. +We have implemented a static transformation of the target program that simplifies the +implementation of the register allocator and improves the quality of the code that +it generates. +We also describe novel techniques to perform register coalescing and +SSA-elimination. +In order to validate our allocation technique, we extensively compare different +flavors of our method against a modern and heavily tuned extension of +the linear-scan register allocator described +<A href="2004-Fall-CS426-LS.pdf">here</A>. +The proposed algorithm consistently produces faster code when the target +architecture provides a small number of registers. +For instance, we have achieved an average speed-up of 9.2% when limiting the +number of registers to four general purpose and three reserved register. +By augmenting the algorithm with an aggressive coalescing technique, we have + +been able to raise the speed improvement up to 13.0%. +</p> + +<P> +This project was supported by the google's +<A href="http://code.google.com/soc/" target="blank">Summer of Code</A> +initiative. Fernando Pereira is funded by +<A href="http://www.capes.gov.br/capes/portal/" target="blank">CAPES</A> +under process number 218603-9. +</P> + +<p> +<a href="http://compilers/fernando/projects/soc/">Project page.</a> +</p> + +</div> <!--=========================================================================--> <div class="www_subsection"> _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits