Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.49 -> 1.50
---
Log message:
implement anyextend from i1 -> i64
---
Diffs of the changes: (+2 -0)
IA64InstrInfo.td | 2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.49
llvm/lib/Target/IA64/IA64InstrInfo.td:1.50
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.49 Sat Nov 25 22:34:26 2006
+++ llvm/lib/Target/IA64/IA64InstrInfo.td Sat May 5 17:17:00 2007
@@ -162,6 +162,8 @@
// zero extend a bool (predicate reg) into an integer reg
def ZXTb : Pat<(zext PR:$src),
(TPCADDIMM22 (ADDS r0, 0), 1, PR:$src)>;
+def AXTb : Pat<(anyext PR:$src),
+ (TPCADDIMM22 (ADDS r0, 0), 1, PR:$src)>;
// normal sign/zero-extends
def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src",
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