Hi Bill, This is not enough context to reproduce this issue. Can you please include more in the .ll file? Specifically, the movswl wouldn't exist if "tmp654" weren't live out I hope. It would be best if the .ll fragments were actually compilable.
-Chris On Oct 2, 2007, at 2:49 PM, Bill Wendling wrote: > Author: void > Date: Tue Oct 2 16:49:31 2007 > New Revision: 42554 > > URL: http://llvm.org/viewvc/llvm-project?rev=42554&view=rev > Log: > Another micro-opt. > > Modified: > llvm/trunk/lib/Target/X86/README.txt > > Modified: llvm/trunk/lib/Target/X86/README.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ > README.txt?rev=42554&r1=42553&r2=42554&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/X86/README.txt (original) > +++ llvm/trunk/lib/Target/X86/README.txt Tue Oct 2 16:49:31 2007 > @@ -1306,3 +1306,19 @@ > movl 88(%esp), %eax > #481.12 > > // > ===------------------------------------------------------------------- > --===// > + > +This code: > + > + %tmp659 = icmp slt i16 %tmp654, 0 ; <i1> [#uses=1] > + br i1 %tmp659, label %cond_true662, label %cond_next715 > + > +produces this: > + > + testw %cx, %cx > + movswl %cx, %esi > + jns LBB4_109 # cond_next715 > + > +Shark tells us that using %cx in the testw instruction is sub- > optimal. It > +suggests using the 32-bit register (which is what ICC uses). > + > +// > ===------------------------------------------------------------------- > --===// > > > _______________________________________________ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
