Author: djg Date: Thu Oct 11 19:01:22 2007 New Revision: 42885 URL: http://llvm.org/viewvc/llvm-project?rev=42885&view=rev Log: Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so may be overloaded with vector types. And add a testcase for codegen for these.
Added: llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll Modified: llvm/trunk/include/llvm/Intrinsics.td llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/include/llvm/Intrinsics.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=42885&r1=42884&r2=42885&view=diff ============================================================================== --- llvm/trunk/include/llvm/Intrinsics.td (original) +++ llvm/trunk/include/llvm/Intrinsics.td Thu Oct 11 19:01:22 2007 @@ -184,6 +184,10 @@ let Properties = [IntrNoMem] in { def int_sqrt : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; def int_powi : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>, llvm_i32_ty]>; + def int_sin : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; + def int_cos : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; + def int_pow : Intrinsic<[llvm_anyfloat_ty, + LLVMMatchType<0>, LLVMMatchType<0>]>; } // NOTE: these are internal interfaces. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=42885&r1=42884&r2=42885&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Oct 11 19:01:22 2007 @@ -2807,6 +2807,22 @@ getValue(I.getOperand(1)), getValue(I.getOperand(2)))); return 0; + case Intrinsic::sin: + setValue(&I, DAG.getNode(ISD::FSIN, + getValue(I.getOperand(1)).getValueType(), + getValue(I.getOperand(1)))); + return 0; + case Intrinsic::cos: + setValue(&I, DAG.getNode(ISD::FCOS, + getValue(I.getOperand(1)).getValueType(), + getValue(I.getOperand(1)))); + return 0; + case Intrinsic::pow: + setValue(&I, DAG.getNode(ISD::FPOW, + getValue(I.getOperand(1)).getValueType(), + getValue(I.getOperand(1)), + getValue(I.getOperand(2)))); + return 0; case Intrinsic::pcmarker: { SDOperand Tmp = getValue(I.getOperand(1)); DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp)); Added: llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll?rev=42885&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll (added) +++ llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll Thu Oct 11 19:01:22 2007 @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep call | count 16 + +declare <4 x double> @llvm.sin.v4f64(<4 x double> %p) +declare <4 x double> @llvm.cos.v4f64(<4 x double> %p) +declare <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q) +declare <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32) + +define <4 x double> @foo(<4 x double> %p) +{ + %t = call <4 x double> @llvm.sin.v4f64(<4 x double> %p) + ret <4 x double> %t +} +define <4 x double> @goo(<4 x double> %p) +{ + %t = call <4 x double> @llvm.cos.v4f64(<4 x double> %p) + ret <4 x double> %t +} +define <4 x double> @moo(<4 x double> %p, <4 x double> %q) +{ + %t = call <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q) + ret <4 x double> %t +} +define <4 x double> @zoo(<4 x double> %p, i32 %q) +{ + %t = call <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32 %q) + ret <4 x double> %t +} _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits