FYI.. You don't need the && on the end of each line. The test will fail if any of the run lines do not succeed.
-Tanya On Dec 17, 2007, at 3:45 PM, Scott Michel wrote: > Author: pingbak > Date: Mon Dec 17 17:45:52 2007 > New Revision: 45134 > > URL: http://llvm.org/viewvc/llvm-project?rev=45134&view=rev > Log: > i32 immediate constant test case for CellSPU > > Added: > llvm/trunk/test/CodeGen/CellSPU/immed32.ll > > Added: llvm/trunk/test/CodeGen/CellSPU/immed32.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ > CellSPU/immed32.ll?rev=45134&view=auto > > ====================================================================== > ======== > --- llvm/trunk/test/CodeGen/CellSPU/immed32.ll (added) > +++ llvm/trunk/test/CodeGen/CellSPU/immed32.ll Mon Dec 17 17:45:52 > 2007 > @@ -0,0 +1,70 @@ > +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s > +; RUN: grep ilhu %t1.s | count 8 && > +; RUN: grep iohl %t1.s | count 6 && > +; RUN: grep il %t1.s | count 11 && > +; RUN: grep 16429 %t1.s | count 1 && > +; RUN: grep 63572 %t1.s | count 1 && > +; RUN: grep 128 %t1.s | count 1 && > +; RUN: grep 32639 %t1.s | count 1 && > +; RUN: grep 65535 %t1.s | count 1 && > +; RUN: grep 16457 %t1.s | count 1 && > +; RUN: grep 4059 %t1.s | count 1 && > +; RUN: grep 49077 %t1.s | count 1 && > +; RUN: grep 1267 %t1.s | count 2 && > +; RUN: grep 16309 %t1.s | count 1 > + > +define i32 @test_1() { > + ret i32 4784128 ;; ILHU via pattern (0x49000) > +} > + > +define i32 @test_2() { > + ret i32 5308431 ;; ILHU/IOHL via pattern (0x5100f) > +} > + > +define i32 @test_3() { > + ret i32 511 ;; IL via pattern > +} > + > +define i32 @test_4() { > + ret i32 -512 ;; IL via pattern > +} > + > +;; double float floatval > +;; 0x4005bf0a80000000 0x402d|f854 2.718282 > +define float @float_const_1() { > + ret float 0x4005BF0A80000000 ;; ILHU/IOHL > +} > + > +;; double float floatval > +;; 0x3810000000000000 0x0080|0000 0.000000 > +define float @float_const_2() { > + ret float 0x3810000000000000 ;; IL 128 > +} > + > +;; double float floatval > +;; 0x47efffffe0000000 0x7f7f|ffff NaN > +define float @float_const_3() { > + ret float 0x47EFFFFFE0000000 ;; ILHU/IOHL via pattern > +} > + > +;; double float floatval > +;; 0x400921fb60000000 0x4049|0fdb 3.141593 > +define float @float_const_4() { > + ret float 0x400921FB60000000 ;; ILHU/IOHL via pattern > +} > + > +;; double float floatval > +;; 0xbff6a09e60000000 0xbfb5|04f3 -1.414214 > +define float @float_const_5() { > + ret float 0xBFF6A09E60000000 ;; ILHU/IOHL via pattern > +} > + > +;; double float floatval > +;; 0x3ff6a09e60000000 0x3fb5|04f3 1.414214 > +define float @float_const_6() { > + ret float 0x3FF6A09E60000000 ;; ILHU/IOHL via pattern > +} > + > +define float @float_const_7() { > + ret float 0.000000e+00 ;; IL 0 via pattern > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits