Author: evancheng
Date: Tue Feb 12 21:23:53 2008
New Revision: 47047
URL: http://llvm.org/viewvc/llvm-project?rev=47047&view=rev
Log:
New tests.
Added:
llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll
llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll
llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll
Added: llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll?rev=47047&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll (added)
+++ llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll Tue Feb 12 21:23:53 2008
@@ -0,0 +1,26 @@
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2
-coalescer-commute-instrs | not grep movaps
+; PR1877
+
[EMAIL PROTECTED] = weak global i32 0 ; <i32*> [#uses=1]
[EMAIL PROTECTED] = weak global float 0.000000e+00 ; <float*>
[#uses=1]
+
+define void @runcont(i32* %source) nounwind {
+entry:
+ %tmp10 = load i32* @NNTOT, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %neuron.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ]
; <i32> [#uses=2]
+ %thesum.0 = phi float [ 0.000000e+00, %entry ], [ %tmp6, %bb ]
; <float> [#uses=1]
+ %tmp2 = getelementptr i32* %source, i32 %neuron.0 ;
<i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2, align 4 ; <i32> [#uses=1]
+ %tmp34 = sitofp i32 %tmp3 to float ; <float> [#uses=1]
+ %tmp6 = add float %tmp34, %thesum.0 ; <float> [#uses=2]
+ %indvar.next = add i32 %neuron.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %tmp10 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb13, label %bb
+
+bb13: ; preds = %bb
+ volatile store float %tmp6, float* @G, align 4
+ ret void
+}
Added: llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll?rev=47047&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll (added)
+++ llvm/trunk/test/CodeGen/X86/coalescer-commute2.ll Tue Feb 12 21:23:53 2008
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2
-coalescer-commute-instrs | grep movsd | count 4
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %bb145.us.i.i
+
+bb145.us.i.i: ; preds = %bb145.us.i.i, %entry
+ %seed.3.reg2mem.0.us.i.i = phi double [ 0.000000e+00, %entry ], [
%tmp9.i.us.i.i, %bb145.us.i.i ] ; <double> [#uses=1]
+ %tmp2.i13.us.i.i = mul double %seed.3.reg2mem.0.us.i.i, 1.680700e+04
; <double> [#uses=1]
+ %tmp3.i.us.i.i = add double %tmp2.i13.us.i.i, 1.000000e+00
; <double> [#uses=1]
+ %tmp6.i15.us.i.i = call double @floor( double 0.000000e+00 ) nounwind
readnone ; <double> [#uses=1]
+ %tmp7.i16.us.i.i = mul double %tmp6.i15.us.i.i, 0xC1DFFFFFFFC00000
; <double> [#uses=1]
+ %tmp9.i.us.i.i = add double %tmp7.i16.us.i.i, %tmp3.i.us.i.i
; <double> [#uses=2]
+ %tmp5.i12.us.i.i = mul double %tmp9.i.us.i.i, 2.000000e+00
; <double> [#uses=1]
+ %tmp6.i.us.i.i = fdiv double %tmp5.i12.us.i.i, 0x41DFFFFFFFC00000
; <double> [#uses=1]
+ %tmp8.i.us.i.i = add double %tmp6.i.us.i.i, -1.000000e+00
; <double> [#uses=1]
+ store double %tmp8.i.us.i.i, double* null, align 8
+ br label %bb145.us.i.i
+}
+
+declare double @floor(double) nounwind readnone
Added: llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll?rev=47047&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll (added)
+++ llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll Tue Feb 12 21:23:53 2008
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2
-coalescer-commute-instrs | grep mov | count 6
+
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*,
%struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*,
%struct.quad_struct* }
+
+define fastcc i32 @perimeter(%struct.quad_struct* %tree, i32 %size) nounwind {
+entry:
+ switch i32 %size, label %UnifiedReturnBlock [
+ i32 2, label %bb
+ i32 0, label %bb50
+ ]
+
+bb: ; preds = %entry
+ %tmp31 = tail call fastcc i32 @perimeter( %struct.quad_struct* null,
i32 0 ) nounwind ; <i32> [#uses=1]
+ %tmp40 = tail call fastcc i32 @perimeter( %struct.quad_struct* null,
i32 0 ) nounwind ; <i32> [#uses=1]
+ %tmp33 = add i32 0, %tmp31 ; <i32> [#uses=1]
+ %tmp42 = add i32 %tmp33, %tmp40 ; <i32> [#uses=1]
+ ret i32 %tmp42
+
+bb50: ; preds = %entry
+ ret i32 0
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 0
+}
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