http://llvm.org/bugs/show_bug.cgi?id=21297
Bug ID: 21297
Summary: [ARM] Allow selection of the SMULW[BT] and SMLAW[BT]
instructions
Product: libraries
Version: trunk
Hardware: All
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: ARM
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
Our current instruction selection for the SMULW[BT] and SMLAW[BT] instructions
is incorrect (http://llvm.org/bugs/show_bug.cgi?id=19396), and I have a patch
up for review to remove the incorrect selection patterns
(http://reviews.llvm.org/D5824).
However, it should be possible to use these instructions from C code, for
example:
int smulwb(int a, short b) {
return ((long long)a * (long long)b) >> 16;
}
This involves a 64-bit multiply on a 32-bit target, which is an isel DAG node
with two results, so it is not possible to write a pattern to select this. This
would require C++ code to perform the match.
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