> -----Original Message----- > From: lng-odp-boun...@lists.linaro.org [mailto:lng-odp- > boun...@lists.linaro.org] On Behalf Of ext Victor Kamensky > Sent: Thursday, November 06, 2014 1:38 AM > To: Mike Holmes > Cc: lng-odp@lists.linaro.org > Subject: Re: [lng-odp] [ODP/PATCH v2] Look ma, no barriers! C11 memory > model > > On 5 November 2014 14:54, Mike Holmes <mike.hol...@linaro.org> wrote: > > > > > > On 5 November 2014 15:26, Victor Kamensky <victor.kamen...@linaro.org> > > wrote: > >> > >> Hi Ola, > >> > >> Please see below general comment about your approach. > >> > >> > +typedef enum { > >> > + /** Relaxed memory order, no ordering of other accesses > enforced > >> > */ > >> > + ODP_MEMORDER_RLX, > >> > + /** Acquire memory order, later accesses cannot move before > >> > + * acquire operation */ > >> > + ODP_MEMORDER_ACQ, > >> > + /** Release memory order, earlier accesses cannot move after > >> > + * release operation */ > >> > + ODP_MEMORDER_RLS > >> > +} odp_memorder_t; > >> > >> Why do you have 3 memory models while C11 > >> has 6? > >> > >> Are you aware about gcc __atomic built extenstion? > >> https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html > >> They follow C11 quite closely with few caveats (like run-time > >> vs built time). Why don't you use those, instead of implementing > >> them by yourself? > > > > > > If we plan to be compiler agnostic do we want to add more gcc mechanisms > ? > > I wrote aboute that below - use tiny wrappers; there will > be similar functionality in another compiler ... > I.e look for "__c11_atomic builtins" > http://clang.llvm.org/docs/LanguageExtensions.html > > And current and Ola's code is already doing it with __sync > atomics, those are gcc mechanisms. What is different > if __atomic gcc builtin will be used? > > Implementing general purpose C11 atomics in ODP > does not make sense to me. IMHO it does not belong > here. ODP is about h/w accelerators abstraction. Where > are h/w accelerators in "C11" (note in quotes) atomics > implementation? > > Thanks, > Victor >
This is exactly the point I have been trying to make on this "C11 atomics" thread. Maybe today, the C11 style atomics fit ARMv8.0 ISA perfectly, but the day when ARM ISA will have proper "far atomics" - it's not optimal any more. The atomics API is targeting "the multi-core scalable" way of incrementing those in memory counters. That process does not include aqc/rel retry cycle. As Victor and I have noted, SW lock implementation abstraction is not hugely important goal for ODP API. GCC __atomic provide already pretty good abstraction for that. If user really cares about lock (or lock free algorithm) implementation, it's better to write it in assembly and takeout all changes from any abstraction to spoil the algorithm. -Petri _______________________________________________ lng-odp mailing list lng-odp@lists.linaro.org http://lists.linaro.org/mailman/listinfo/lng-odp
