On 05.04.2017 00:00, Ola Liljedahl wrote: > I think I missed one comment. > > > On 04/04/2017, 22:14, "Dmitry Eremin-Solenikov" > <dmitry.ereminsoleni...@linaro.org> wrote: > >> On 04.04.2017 21:48, Brian Brooks wrote: >>> Signed-off-by: Ola Liljedahl <ola.liljed...@arm.com> >>> Reviewed-by: Brian Brooks <brian.bro...@arm.com> >>> Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com> >>> --- >>> platform/linux-generic/include/odp_llsc.h | 332 >>> ++++++++++++++++++++++++++++++ >>> 1 file changed, 332 insertions(+) >>> create mode 100644 platform/linux-generic/include/odp_llsc.h >>> >>> diff --git a/platform/linux-generic/include/odp_llsc.h >>> b/platform/linux-generic/include/odp_llsc.h >>> new file mode 100644 >>> index 00000000..ea60c54b >>> --- /dev/null >>> +++ b/platform/linux-generic/include/odp_llsc.h >>> @@ -0,0 +1,332 @@ >>> +/* Copyright (c) 2017, ARM Limited >>> + * All rights reserved. >>> + * >>> + * SPDX-License-Identifier:BSD-3-Clause >>> + */ >>> + >>> +#ifndef ODP_LLSC_H_ >>> +#define ODP_LLSC_H_ >>> + >>> +#include <odp_config_internal.h> >>> + >>> >>> +/*********************************************************************** >>> ******* >>> + * LL/SC primitives >>> + >>> ************************************************************************* >>> ****/ > There¹s your comment. > > LL <=> load linked > SC <=> store conditional > The original name of this RISCy mechanism for implementing atomic > operations. Also the instruction names used on MIPS. > I did not want to use all caps for function names. > > I actually prefer the MIPS abbreviations to the ARM names > (load-exclusive/store-exclusive).
It would be nice to have them in. In the end, we are not writing an assembly, do we? -- With best wishes Dmitry
