Hello,
I found that commit 2539387611b8b15bb2367275df9bfd3e29dc2a0e in December
2010 broke the Gdium's GPIOs by doing this:
- set ARCH_NR_GPIOS to 4, which can fit the Loongson 2f's 4 GPIOs but
not the 64 GPIOs from the SM501 (the driver expects ARCH_NR_GPIOS==256)
- register ARCH_NR_GPIOS ls2f GPIOs, which allocates all potential GPIOs
to ls2f and leaves no room for the SM501 GPIOs.
As many things are connected to the GPIOs on the Gdium, this broke many
things.
I attached a patch fixing this problem. It sets ARCH_NR_GPIOS back to
256 for Gdium and lets the ls2f driver only register the 4 GPIOs of the
CPU. It's a patch against an old head (Linux 3.2), but I don't think
current code has changed a lot. I hope to work on an up-to-date head
once my netbook works At least I hope it can be useful for someone.
Regards
--
Julien De Bona - [email protected]
--
You received this message because you are subscribed to the Google Groups
"loongson-dev" group.
To post to this group, send email to [email protected].
To unsubscribe from this group, send email to
[email protected].
For more options, visit this group at
http://groups.google.com/group/loongson-dev?hl=en.
diff --git a/arch/mips/include/asm/mach-loongson/gpio.h b/arch/mips/include/asm/mach-loongson/gpio.h
index 0fd06bf..a27c003 100644
--- a/arch/mips/include/asm/mach-loongson/gpio.h
+++ b/arch/mips/include/asm/mach-loongson/gpio.h
@@ -14,7 +14,11 @@
#define __STLS2F_GPIO_H
#ifdef CONFIG_GENERIC_GPIO
+#ifdef CONFIG_DEXXON_GDIUM
+#define ARCH_NR_GPIOS 256
+#else
#define ARCH_NR_GPIOS 4
+#endif
#include <asm-generic/gpio.h>
extern void gpio_set_value(unsigned gpio, int value);
diff --git a/arch/mips/loongson/common/gpio.c b/arch/mips/loongson/common/gpio.c
index a8645f8..e8a0ffa 100644
--- a/arch/mips/loongson/common/gpio.c
+++ b/arch/mips/loongson/common/gpio.c
@@ -19,6 +19,7 @@
#include <loongson.h>
#include <linux/gpio.h>
+#define STLS2F_N_GPIO 4
#define STLS2F_GPIO_IN_OFFSET 16
static DEFINE_SPINLOCK(gpio_lock);
@@ -28,7 +29,7 @@ int gpio_get_value(unsigned gpio)
u32 val;
u32 mask;
- if (gpio >= ARCH_NR_GPIOS)
+ if (gpio >= STLS2F_N_GPIO)
return __gpio_get_value(gpio);
mask = 1 << (gpio + STLS2F_GPIO_IN_OFFSET);
@@ -45,7 +46,7 @@ void gpio_set_value(unsigned gpio, int state)
u32 val;
u32 mask;
- if (gpio >= ARCH_NR_GPIOS) {
+ if (gpio >= STLS2F_N_GPIO) {
__gpio_set_value(gpio, state);
return ;
}
@@ -65,7 +66,7 @@ EXPORT_SYMBOL(gpio_set_value);
int gpio_cansleep(unsigned gpio)
{
- if (gpio < ARCH_NR_GPIOS)
+ if (gpio < STLS2F_N_GPIO)
return 0;
else
return __gpio_cansleep(gpio);
@@ -77,7 +78,7 @@ static int ls2f_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
u32 temp;
u32 mask;
- if (gpio >= ARCH_NR_GPIOS)
+ if (gpio >= STLS2F_N_GPIO)
return -EINVAL;
spin_lock(&gpio_lock);
@@ -96,7 +97,7 @@ static int ls2f_gpio_direction_output(struct gpio_chip *chip,
u32 temp;
u32 mask;
- if (gpio >= ARCH_NR_GPIOS)
+ if (gpio >= STLS2F_N_GPIO)
return -EINVAL;
gpio_set_value(gpio, level);
@@ -128,7 +129,7 @@ static struct gpio_chip ls2f_chip = {
.direction_output = ls2f_gpio_direction_output,
.set = ls2f_gpio_set_value,
.base = 0,
- .ngpio = ARCH_NR_GPIOS,
+ .ngpio = STLS2F_N_GPIO,
};
static int __init ls2f_gpio_setup(void)
