I'm using this ethernet hardware too and its sad but true, the device does only have 4 fixed size (receive) buffers. So if u receive 4 packets very fast, the (hardware)buffers are full and the chip is dropping packets till u have read them out. i'm using DMA data transfers and got down to 85µs/packet that's my maximum interface throughput running NIOS cpu with 50Mhz (and its not trivial to use DMA with the 91c111, u have to serve the ARDY line or use max. Interface speed of 100ns cycle-time, and don't 4get to flush CPU data caches after DMA read)
Routing packets thought the stack will take much more time than, but if u have send-delays, u can process the packets from a buffer after the bursts. Greetings Robert Hard/Software engineer AV-Digital Austria _______________________________________________ lwip-users mailing list [email protected] http://lists.nongnu.org/mailman/listinfo/lwip-users
