Hi Bill,
I could, but mixed
compilation between big endian and little endian is not supported
unfortunately. But that idea is definitely a good one.
@all
The
misalignment I am getting is due to the stripped ethernet header which
then puts the ip address fields in the ip header in a non aligned
address
for a 32 bits variable. Structure packing should then (if it
works) packs the structure e.g. #pragma pack (1) in smallest alignment
(byte), and generate the corresponding
assembler codes that access
the elements of the structure bytewise, preventing misalignment due to
access of multi byte members in a non-aligned boundary.
Am I correct ? Or am I expecting too much from my compiler ?
Greetings
Ikhwan
From: [EMAIL PROTECTED]
To: [email protected]
Subject: RE: [lwip-users] Misalignment problems on PowerPC (little endian mode)
Date: Mon, 12 May 2008 18:57:17 +0000
Hi Bill,
Cool. Ill take a look at those. Im using the MPC860. Ill take a look at the
errata though. Thanks to u and Simon for the advices. If
I do get anything out of Wind river Ill post it here with the hope the next
person with the same issue could benefit from it.
Greetings
Ikhwan
From: [EMAIL PROTECTED]
To: [email protected]
Subject: RE: [lwip-users] Misalignment problems on PowerPC (little endian mode)
Date: Mon, 12 May 2008 09:19:58 -0400
Hi Ikhwan,
I’m currently using Freescale CodeWarrior Power Architecture C/C++ compiler –
Ver 8.8.1 (latest version) for the MPC8349EA PPC processor.
In Big-endian mode of course. lwIP performance and bandwidth are excellent and
extended saturated TCP bandwidth receive tests (over 3 billion packets
continuous) has been perfect. It took some time to work around a memory
coherency or lockup problem in the PowerPC that I’m still working with
Freescale on trying to figure out if it’s me doing something I shouldn’t be
doing or not. There’s an extensive errata on this part including 2 problems
with TSEC lockups – neither of which appear to be what I’m seeing.
Bill
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Muhamad Ikhwan
Ismail
Sent: Saturday, May 10, 2008 1:09 AM
To: Mailing list for lwIP users
Subject: RE: [lwip-users] Misalignment problems on PowerPC (little endian mode)
Hi Bill
Well I wish I could do it in big endian for the PowerPC, since the PowerPC
corrects the alignment
problems in the hardware itself in big endian mode. Unfortunately the project
itself requires me
to do it little endian. Which compiler did you use last time ?
Greetings
Ikhwan
> Date: Fri, 9 May 2008 17:30:10 +0200
> From: [EMAIL PROTECTED]
> To: [email protected]
> Subject: Re: [lwip-users] Misalignment problems on PowerPC (little endian
> mode)
>
> Muhamad Ikhwan Ismail wrote:
> >
> > Hi,
> >
> > Thanks Bill and Simon. Simon is right, my payload is aligned. The
> > problem arises when the Ethernet header
> > gets stripped, the IP addr field is not aligned when it gets accessed.
> > And I didnt know structure packing is a must. Then I have to
> > find a way to make my port works. Meaning even if i fixed my ip addr
> > processing macros and functions, Ill still get problems ?
> I'm not sure but I think so, yeah. The reason is the same reason
> 'network byte order' is used: when you exchange data over the network,
> everyone would have to use the same alignment. Instead, packing is used.
> > I thought i woulnt since all e.g TCP header fields are 2 bytes aligned ?
> At least DNS had a problem with non-packed mode, I think. DHCP could
> have problems, too...
>
> Simon
>
>
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