Dear all,

Sorry for cross posting, but I think the subject is really relevant for
both mls.
Peter van der stok in the coman ml proposed the following classification:

>>     peter> Next to the classification on memory, I should like to add a
>>     peter> classification on power availability. In small nodes the
>>     peter> largest power consumer is the transmitter. So I propose to
>>     peter> classify the nodes according to their power-supply expressed
>>     peter> as its transmission capacity. I propose three types of
>>     peter> devices:
>>
>>     peter> P0: battery-less devices. They have a capacitor which is
>>     peter> charged by harvesting power delivered by a small movement or
>>     peter> light. The stored energy is just sufficient to send 1 or at
>>
>> Is it important to realize that P0 devices are not limited by the number
>> of packets they can send, just limited as to the rate?
>>
>>     peter> P1: battery-constrained devices. They have a battery with a
>>
>> Whereas, P1 devices are limited by the total number of packets they can
>> send.  Every packet they send today is a packet they can not send
>> tomorrow.

I totally second Peter's classification with regard to power.
As far as I know draft-cao-lwig-syn-layer-00 was the first draft in lwig
dealing with the subject or reducing power consumption and, while a big
amount of the work can be achieved with the radio duty cycle I think
such kind of work should be heavily encouraged.
Moreover, it seems to me it would be reasonable to split in different
constrain classes data memory and code memory. While that's true than in
current devices the two follows more or less the classes presented in
draft-bormann-lwig-terms-00, implementing "low complexity code" often
clash with "reducing data memory usage". Refusing to use a managed
memory allocator (as presented in draft-kovatsch-lwig-class1-coap and as
I personally do) is a very good example of that, even if that's true
that is a practice used mainly in order to achieve predictability.
Regarding data memory it seems also reasonable to me to consider also
stateless devices.
Finally, to complete the classification I'd consider also "computing
power" because clock, register bit length, hw crypto support (think aes)
and  instruction set can really make the difference both wrt complexity
and feasibility.
I think for both coman and lwig this 4-axis classification could be useful.
Any feedback?

Best regards,
Pierpaolo
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