Yes (ADC functionality is not added to the bitfiles from that Quartus project: https://github.com/machinekit/mksocfpga/tree/master/HW/QuartusProjects/DE0_Nano_SoC_DB25)
Initially only the recent added 3 new .rbf bitfiles, generated from these config files have the ADC functionality included: https://github.com/machinekit/mksocfpga/tree/master/HW/hm2/config/DE0_Nano_SoC_Cramps The Adc functionality is only implemented in the new recently added DE0 / DE10(commit pending) Nano SoC configs https://github.com/the-snowwhite/mksocfpga/tree/DE10_Nano_FB_Cramps/HW/QuartusProjects/DE10_Nano_FB_Cramps https://github.com/machinekit/mksocfpga/tree/master/HW/QuartusProjects/DE0_Nano_SoC_Cramps For the CRAMPS board initially: First exercise was to get the CRAMPS board added for the fpga socs and the universal soc_adc drivers / soc_adc_temp usercomponent added to machinekit I have posted a thread linking to a demo sd Image that will boot the DE10 with 1024x768 screen desktop And also boot the DE0_Nano_SoC in ssh -X konsole mode. Generated via my updated soc_buildscripts @ github The CRAMPS only version is an evolvement step towards Implementing a new systemverilog based config structure I have been working on visible in my mksocfpga3 repo, reduced to only include what is needed for utilizng all functionality of the CRAMPS I/O board. It may be simple to add the DB25.7I76_7I76_7I76_7I76.dtbo and needed cores as an additional config to these 2 _CRAMPS quartus projects. However I do not have a DB 25 adaptor or a mesa 7I76_7I76 available for testing, therefore the CRAMPS version first :-) I you need the ADC functionality in the DB25_ quartus project you will have to involve an VHDL expert to add the ADC hardware core into this VHDL only quartus project, as I can only read/modify VHDL code not construct in this language. BTW aso hidden in the New CRAMPS HW configs is full gpio_0/1 mux functionality, yet to be implemented in MK software: https://github.com/machinekit/mksocfpga/blob/master/HW/QuartusProjects/Common/gpio_adr_decoder_reg.sv#L26 On Wednesday, 30 August 2017 15:24:29 UTC+2, Bas de Bruijn wrote: > > > > On Monday, August 28, 2017 at 9:35:16 AM UTC+2, Bas de Bruijn wrote: >> >> >> >> On Sunday, August 27, 2017 at 4:15:59 PM UTC+2, Michael Brown wrote: >>> >>> The 2 (tested) commits are now online: >>> >>> https://github.com/machinekit/mksocfpga/pull/87 >>> https://github.com/machinekit/machinekit/pull/1253 >>> >> >> Sounds great Michael! >> I'll be updating my De0-nano board and I'll be trying out the ADC! >> Superb! >> >> Bas >> > > Michael B, > Are there any additional requirements on using the ADC? > I load an existing configuration, and try to see the ADC inputs change > (potmeter attached to pins) > > machinekit@mksocfpga:~$ export DEBUG=5 > machinekit@mksocfpga:~$ halrun -I > msgd:0 stopped > rtapi:0 stopped > halcmd: loadrt hostmot2 > <stdin>:2: Realtime module 'hostmot2' loaded > halcmd: newinst hm2_soc_ol hm2-socfpga0 -- > config="firmware=socfpga/dtbo/DE0_Nano_SoC_DB25.7I76_7I76_7I76_7I76.dtbo > num_stepgens=5 enable_adc=1" debug=1 > <stdin>:3: Realtime module 'hm2_soc_ol' loaded > halcmd: show funct > Exported Functions: > Comp Inst CodeAddr Arg FP Users Type Name > 66 0000b6685725 000000000000 NO 0 user delinst > 80 82 0000b559cecd 00000003b588 NO 0 xthread > hm2_de0n.0.pet_watchdog > 80 82 0000b5586005 00000003b588 YES 0 xthread > hm2_de0n.0.read > 80 82 0000b5586191 00000003b588 YES 0 xthread > hm2_de0n.0.read_gpio > 80 82 0000b55860c5 00000003b588 YES 0 xthread > hm2_de0n.0.write > 80 82 0000b55861c1 00000003b588 YES 0 xthread > hm2_de0n.0.write_gpio > 66 0000b66855d5 000000000000 NO 0 user newinst > > halcmd: newthread st 1000000 fp > halcmd: addf hm2_de0n.0.read st > <stdin>:7: Function 'hm2_de0n.0.read' added to thread 'st', rmb=0 wmb=0 > halcmd: addf hm2_de0n.0.write st > <stdin>:8: Function 'hm2_de0n.0.write' added to thread 'st', rmb=0 wmb=0 > halcmd: addf hm2_de0n.0.pet_watchdog st > <stdin>:9: Function 'hm2_de0n.0.pet_watchdog' added to thread 'st', rmb=0 > wmb=0 > halcmd: show pin hm2_de0n.0.nano_soc_adc.ch > Component Pins: > Comp Inst Type Dir Value > Name Epsilon Flags linked to: > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.0.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.1.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.2.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.3.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.4.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.5.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.6.out --l- > 80 82 u32 OUT 0x00000000 > hm2_de0n.0.nano_soc_adc.ch.7.out --l- > > halcmd: start > <stdin>:11: Realtime threads started > halcmd: show pin hm2_de0n.0.nano_soc_adc.ch > Component Pins: > Comp Inst Type Dir Value > Name Epsilon Flags linked to: > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.0.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.1.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.2.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.3.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.4.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.5.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.6.out --l- > 80 82 u32 OUT 0x0001FFFF > hm2_de0n.0.nano_soc_adc.ch.7.out --l- > > On Tuesday, 15 August 2017 23:31:56 UTC+2, Michael Brown wrote: >> >> Thanks a lot that pushed me in the right direction. >> >> I now have my 2 python based Machineface configs fully up and running >> with your cramps interface, temperature tmc2130 (spi mode) steppers, pwm >> etc all fully functional. >> >> Schematics for cramps and pcb layouts for the new capasitive probe sensor >> addition(KiCad), py-spi-dev and other related files >> are now on github and I expect to have the (once again rebased)commits >> for mksocfpga and machinekit ready to launch in beginning of next week when >> I return to my workstation. >> >> >> >> On Monday, 17 July 2017 18:23:39 UTC+2, Charles Steinkuehler wrote: >>> >>> On 7/16/2017 3:09 PM, Michael Brown wrote: >>> > Next I tried out with the image you pointed to only linking to these >>> > instructions: docker pull cdsteinkuehler/jessie-quartus-15.1.2 this >>> > gives me an image I then can start with: docker run -it >>> > cdsteinkuehler/jessie-quartus-15.1.2 And then what ? >>> >>> Follow the instructions here: >>> >>> >>> https://github.com/cdsteinkuehler/mksocfpga/blob/master/README.MD#launch-a-docker-build-machine-with-the-latest-mksocfpga-source-code >>> >>> >>> Basically, the steps are: >>> >>> * Clone the mksocfpga repo >>> * Launch docker with the repo mounted in the docker image >>> * Build the protobuf bindings >>> * Build the FPGA bitfile >>> >>> ...or is that not what you're trying to do? >>> >>> -- >>> Charles Steinkuehler >>> cha...@steinkuehler.net >>> >> -- website: http://www.machinekit.io blog: http://blog.machinekit.io github: https://github.com/machinekit --- You received this message because you are subscribed to the Google Groups "Machinekit" group. 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