On 2/27/2019 7:26 AM, Damien Dando wrote:
> 
>> Sadly, the Decamux code is using state register 6, or you could use 
>> registers 4-7 for the GPIO values.  But you can do an offset when 
>> performing the XIN/XOUT (set SHIFT_EN in the SPP register), so you can 
>> use any other chunk of 4 registers in the scratchpad (maybe R0-3?).
> do you know how many PRU cycle it takes to set the SHIFT_EN bit in SPP reg.? 
> There is the list of timing here:
> http://www.ti.com/lit/sprace8 but I don't know if SHIFT_EN is considered as a 
> "PRU CTRL" register, "PRU CFG" or something else..

The SPP register is in the "PRU CTRL" domain.

The latency doesn't really matter, the SPP write would be a one-time
setup step at the start of the code.  Usually, however, writes
complete quickly as they do not need a response from the far end.

The existing XIN/XOUT instructions will need to make sure r0.b0 is
cleared first, but that's only one additional instruction per loop
(the XOUT is a one-time setup step) and it allows much more flexible
use of the scratchpad.

> Also how long does it takes to load data from the PRU DRAM to
> r0-31, the previous link say 3PRU cycles (15ns) but does that
> depends of how many bytes we load? or it takes the same amount of
> time regardless of the number of bytes?
I believe it will take one extra clock for each additional DWORD read
from the PRU data memory.

-- 
Charles Steinkuehler
char...@steinkuehler.net

-- 
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