Hello All:

If it's ok that I can make a small suggestion? Please forgive me I am still
learning Machinekit and mksocfpga so this may not apply.
I have noticed that the Terasic DE10-Nano-Soc Board was on "sale" due to
Covid-19, link below. Please let me know if works for you.

http://mail.terasic.com.tw/epaper/2020/limitedtime.html

John: Would it be possible to use the DE10-Nano-SOC Board for your
project?

https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=205&No=1046

This board my help your IO problem as well as have a FPGA Fabric so you can
implement multiple Motor controllers or custom HDL code if required.

Just a thought...

Thanks,.
Mike Kennedy.

On Thu, Apr 30, 2020 at 7:14 PM John Allwine <j...@pocketnc.com> wrote:

> I'm not convinced of that. Since the register table is fully allocated it
> would likely require swapping registers out to scratch pads and assigning
> pin numbers that are larger than a byte (this would significantly affect
> the SET_CLR_BIT and PINTABLE implementation) and at the very least adding
> twice as many memory writes. I don't fully understand the ramifications of
> making some of those changes, but it would certainly have a performance
> penalty by writing to more registers, even if it is easy to implement. I'm
> concerned with performance, so any modifications that slow down
> hal_pru_generic I'd like to avoid. I'm trying to reach high step
> frequencies with 5 different axes. I'm hoping to achieve them with
> hal_pru_generic, so I'm thinking of even adding build macros so
> hal_pru_generic could have access to PRU code that doesn't perform any
> memory writes (but rather uses only direct outputs). I'm still testing
> what's feasible, but being able to divide up that work between different
> PRUs could also be key, so I like the idea of hal_pru_generic being
> instantiable.
>
> On Thursday, April 30, 2020 at 3:28:51 PM UTC-6, Charles Steinkuehler
> wrote:
>>
>> I think it would be easier to extend the existing logic to simply write
>> to more registers, but an icomp version of hal_pru_generic could still
>> be helpful.  With four PRU cores in the BBAI, I can definitely see the
>> benefit to having more than one PRU running either to divide the work or
>> to allow the PRUs to run with different cycle times.
>>
>> On 4/29/2020 10:13 PM, John Allwine wrote:
>> > Is there documentation on how to write an instantiable HAL component in
>> C? I’ve been making modifications to hal_pru_generic to work on the
>> BeagleBone AI. hal_pru_generic is implemented in such a way that only 4
>> GPIO ports can be used. The BBB only has 4 GPIO ports, so any pin on the P8
>> and P9 headers can be used on a single instance of hal_pru_generic. The
>> BeagleBone AI has 8 GPIO ports, so without significant changes to
>> hal_pru_generic, not all pins on the P8 and P9 headers can be accessed from
>> a single instance. The BeagleBone AI does expose many more pins as direct
>> outputs, but I’m unable to instantiate more than one instance of
>> hal_pru_generic in order to take advantage of certain pin configurations.
>> Is it possible to make hal_pru_generic instantiable?
>> >
>>
>> --
>> Charles Steinkuehler
>> cha...@steinkuehler.net
>>
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