Hi all, I am looking to gain a better understanding of how the clocking for the Hostmot2 firmware works in mksocfpga. In the Vivado block diagram, the hostmot2_ip_wrap module has 3 clock ports: clklow, clkmed, and clkhigh. The TCL scripts to generate the Vivado projects all connect clklow and clkmed together. Clkmed and clklow connect to a 100MHz clock, and clkhigh connects to a 200MHz clock. Where did these numbers come from?
Also, in the PIN_XXXXX file for each configuration, each module has an associated clock tag. For instance, in PIN_ULTR_36.vhd, the PWM module has the ClockHighTag (https://github.com/machinekit/mksocfpga/blob/master/HW/VivadoProjects/avnet/ultra96/const/PIN_ULTR_36.vhd#L83). Is there some place in the HM2 code that defines what clock tag each module should have? Thanks, Cameron -- website: http://www.machinekit.io blog: http://blog.machinekit.io github: https://github.com/machinekit --- You received this message because you are subscribed to the Google Groups "Machinekit" group. To unsubscribe from this group and stop receiving emails from it, send an email to machinekit+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/machinekit/8b8a9aa3-d8c9-4266-9697-0ef62eca2f3bo%40googlegroups.com.
