Revision: 91 http://svn.sourceforge.net/mactel-linux/?rev=91&view=rev Author: nboichat Date: 2007-03-21 03:58:05 -0700 (Wed, 21 Mar 2007)
Log Message: ----------- New coretemp patches (0008 is not essential). Modified Paths: -------------- trunk/kernel/mactel-patches-2.6.21/0004-coretemp.patch Added Paths: ----------- trunk/kernel/mactel-patches-2.6.21/0003-msr-on-cpu.patch trunk/kernel/mactel-patches-2.6.21/0008-msr.patch Added: trunk/kernel/mactel-patches-2.6.21/0003-msr-on-cpu.patch =================================================================== --- trunk/kernel/mactel-patches-2.6.21/0003-msr-on-cpu.patch (rev 0) +++ trunk/kernel/mactel-patches-2.6.21/0003-msr-on-cpu.patch 2007-03-21 10:58:05 UTC (rev 91) @@ -0,0 +1,204 @@ +This patch adds support for _safe (exception handled) variants of rdmsr_on_cpu and wrmsr_on_cpu. This is needed for the new coretemp driver, which might step into non-existing MSR (poorly documented). + +From: Rudolf Marek <[EMAIL PROTECTED]> + + +--- + + arch/i386/lib/msr-on-cpu.c | 71 ++++++++++++++++++++++++++++++++++++++++---- + include/asm-i386/msr.h | 12 +++++++ + include/asm-x86_64/msr.h | 11 +++++++ + 3 files changed, 87 insertions(+), 7 deletions(-) + +diff --git a/arch/i386/lib/msr-on-cpu.c b/arch/i386/lib/msr-on-cpu.c +index 1c46bda..bd9920b 100644 +--- a/arch/i386/lib/msr-on-cpu.c ++++ b/arch/i386/lib/msr-on-cpu.c +@@ -6,6 +6,7 @@ + struct msr_info { + u32 msr_no; + u32 l, h; ++ int err; + }; + + static void __rdmsr_on_cpu(void *info) +@@ -15,20 +16,38 @@ static void __rdmsr_on_cpu(void *info) + rdmsr(rv->msr_no, rv->l, rv->h); + } + +-void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) ++static void __rdmsr_safe_on_cpu(void *info) + { ++ struct msr_info *rv = info; ++ ++ rv->err = rdmsr_safe(rv->msr_no, &rv->l, &rv->h); ++} ++ ++static int _rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h, int safe) ++{ ++ int err = 0; + preempt_disable(); + if (smp_processor_id() == cpu) +- rdmsr(msr_no, *l, *h); ++ if (safe) ++ err = rdmsr_safe(msr_no, l, h); ++ else ++ rdmsr(msr_no, *l, *h); + else { + struct msr_info rv; + + rv.msr_no = msr_no; +- smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 0, 1); ++ if (safe) { ++ smp_call_function_single(cpu, __rdmsr_safe_on_cpu, ++ &rv, 0, 1); ++ err = rv.err; ++ } else { ++ smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 0, 1); ++ } + *l = rv.l; + *h = rv.h; + } + preempt_enable(); ++ return err; + } + + static void __wrmsr_on_cpu(void *info) +@@ -38,21 +57,61 @@ static void __wrmsr_on_cpu(void *info) + wrmsr(rv->msr_no, rv->l, rv->h); + } + +-void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) ++static void __wrmsr_safe_on_cpu(void *info) + { ++ struct msr_info *rv = info; ++ ++ rv->err = wrmsr_safe(rv->msr_no, rv->l, rv->h); ++} ++ ++static int _wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h, int safe) ++{ ++ int err = 0; + preempt_disable(); + if (smp_processor_id() == cpu) +- wrmsr(msr_no, l, h); ++ if (safe) ++ err = wrmsr_safe(msr_no, l, h); ++ else ++ wrmsr(msr_no, l, h); + else { + struct msr_info rv; + + rv.msr_no = msr_no; + rv.l = l; + rv.h = h; +- smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 0, 1); ++ if (safe) { ++ smp_call_function_single(cpu, __wrmsr_safe_on_cpu, ++ &rv, 0, 1); ++ err = rv.err; ++ } else { ++ smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 0, 1); ++ } + } + preempt_enable(); ++ return err; ++} ++ ++void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) ++{ ++ _wrmsr_on_cpu(cpu, msr_no, l, h, 0); ++} ++ ++void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) ++{ ++ _rdmsr_on_cpu(cpu, msr_no, l, h, 0); ++} ++ ++int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) ++{ ++ return _wrmsr_on_cpu(cpu, msr_no, l, h, 1); ++} ++ ++int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) ++{ ++ return _rdmsr_on_cpu(cpu, msr_no, l, h, 1); + } + + EXPORT_SYMBOL(rdmsr_on_cpu); + EXPORT_SYMBOL(wrmsr_on_cpu); ++EXPORT_SYMBOL(rdmsr_safe_on_cpu); ++EXPORT_SYMBOL(wrmsr_safe_on_cpu); +diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h +index ec3b680..5ed97c8 100644 +--- a/include/asm-i386/msr.h ++++ b/include/asm-i386/msr.h +@@ -4,7 +4,7 @@ + #ifdef CONFIG_PARAVIRT + #include <asm/paravirt.h> + #else +- ++#include <linux/errno.h> + /* + * Access to machine-specific registers (available on 586 and better only) + * Note: the rd* operations modify the parameters directly (without using +@@ -86,6 +86,8 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) + #ifdef CONFIG_SMP + void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); + void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); ++int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); ++int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); + #else /* CONFIG_SMP */ + static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) + { +@@ -95,6 +97,14 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) + { + wrmsr(msr_no, l, h); + } ++static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) ++{ ++ return rdmsr_safe(msr_no, l, h); ++} ++static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) ++{ ++ return wrmsr_safe(msr_no, l, h); ++} + #endif /* CONFIG_SMP */ + + /* symbolic names for some interesting MSRs */ +diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h +index 902f9a5..0327f66 100644 +--- a/include/asm-x86_64/msr.h ++++ b/include/asm-x86_64/msr.h +@@ -2,6 +2,7 @@ + #define X86_64_MSR_H 1 + + #ifndef __ASSEMBLY__ ++#include <linux/errno.h> + /* + * Access to machine-specific registers (available on 586 and better only) + * Note: the rd* operations modify the parameters directly (without using +@@ -163,6 +164,8 @@ static inline unsigned int cpuid_edx(unsigned int op) + #ifdef CONFIG_SMP + void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); + void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); ++int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); ++int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); + #else /* CONFIG_SMP */ + static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) + { +@@ -172,6 +175,14 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) + { + wrmsr(msr_no, l, h); + } ++static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) ++{ ++ return rdmsr_safe(msr_no, l, h); ++} ++static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) ++{ ++ return wrmsr_safe(msr_no, l, h); ++} + #endif /* CONFIG_SMP */ + + #endif Modified: trunk/kernel/mactel-patches-2.6.21/0004-coretemp.patch =================================================================== --- trunk/kernel/mactel-patches-2.6.21/0004-coretemp.patch 2007-03-21 10:57:16 UTC (rev 90) +++ trunk/kernel/mactel-patches-2.6.21/0004-coretemp.patch 2007-03-21 10:58:05 UTC (rev 91) @@ -5,33 +5,30 @@ --- - Documentation/hwmon/coretemp | 37 ++++ - arch/i386/kernel/msr.c | 31 ++- - drivers/hwmon/Kconfig | 9 + + Documentation/hwmon/coretemp | 36 ++++ + MAINTAINERS | 6 + + drivers/hwmon/Kconfig | 8 + drivers/hwmon/Makefile | 1 - drivers/hwmon/coretemp.c | 400 ++++++++++++++++++++++++++++++++++++++++++ - include/asm-i386/msr.h | 3 - include/asm-x86_64/msr.h | 3 - 7 files changed, 470 insertions(+), 14 deletions(-) + drivers/hwmon/coretemp.c | 406 ++++++++++++++++++++++++++++++++++++++++++ + 5 files changed, 457 insertions(+), 0 deletions(-) diff --git a/Documentation/hwmon/coretemp b/Documentation/hwmon/coretemp new file mode 100644 -index 0000000..ba02dee +index 0000000..870cda9 --- /dev/null +++ b/Documentation/hwmon/coretemp -@@ -0,0 +1,37 @@ +@@ -0,0 +1,36 @@ +Kernel driver coretemp +====================== + +Supported chips: + * All Intel Core family + Prefix: 'coretemp' -+ Addresses scanned: CPUID (family 0x6, models 0xe, 0xf) ++ CPUID: family 0x6, models 0xe, 0xf + Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual + Volume 3A: System Programming Guide + +Author: Rudolf Marek -+Contact: Rudolf Marek <[EMAIL PROTECTED]> + +Description +----------- @@ -39,7 +36,7 @@ +This driver permits reading temperature sensor embedded inside Intel Core CPU. +Temperature is measured in degrees Celsius and measurement resolution is +1 degree C. Valid temperatures are from 0 to TjMax degrees C, because -+the actual temperature is in fact a delta from TjMax. ++the actual value of temperature register is in fact a delta from TjMax. + +Temperature known as TjMax is the maximum junction temperature of processor. +Intel defines this temperature as 85C or 100C. At this temperature, protection @@ -47,136 +44,44 @@ +may be raised, if the temperature grows enough (more than TjMax) to trigger +the Out-Of-Spec bit. Following table summarizes the exported sysfs files: + -+temp1_input - Core temperature (in milidegrees of Celsius). -+temp1_crit - Maximum junction temperature (in milidegrees of Celsius). ++temp1_input - Core temperature (in millidegrees Celsius). ++temp1_crit - Maximum junction temperature (in millidegrees Celsius). +temp1_crit_alarm - Set when Out-of-spec bit is set, never clears. + Correct CPU operation is no longer guaranteed. -+temp1_label - Contains string with the "Core X", where X is processor ++temp1_label - Contains string "Core X", where X is processor + number. + -+The TjMax temperature is set to 85C if undocumented model specific register -+(UMSR) 0xee has bit 30 set. If not the TjMax is 100C as documented in processor -+datasheet. Intel will not disclose this information to individuals. -diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c -index bcaa6e9..c9a8f88 100644 ---- a/arch/i386/kernel/msr.c -+++ b/arch/i386/kernel/msr.c -@@ -87,7 +87,7 @@ static void msr_smp_rdmsr(void *cmd_block) - cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]); - } ++The TjMax temperature is set to 85 degrees C if undocumented model specific ++register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as ++(sometimes) documented in processor datasheet. +diff --git a/MAINTAINERS b/MAINTAINERS +index cbfdc3e..f74beef 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -958,6 +958,12 @@ M: [EMAIL PROTECTED] + W: http://www.wittsend.com/computone.html + S: Maintained --static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) -+int msr_write(int cpu, u32 reg, u32 eax, u32 edx) - { - struct msr_command cmd; - int ret; -@@ -107,7 +107,7 @@ static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) - return ret; - } - --static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx) -+int msr_read(int cpu, u32 reg, u32 * eax, u32 * edx) - { - struct msr_command cmd; - int ret; -@@ -131,19 +131,22 @@ static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx) - - #else /* ! CONFIG_SMP */ - --static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) -+int msr_write(int cpu, u32 reg, u32 eax, u32 edx) - { - return wrmsr_eio(reg, eax, edx); - } - --static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) -+int msr_read(int cpu, u32 reg, u32 *eax, u32 *edx) - { - return rdmsr_eio(reg, eax, edx); - } - - #endif /* ! CONFIG_SMP */ - --static loff_t msr_seek(struct file *file, loff_t offset, int orig) -+EXPORT_SYMBOL_GPL(msr_write); -+EXPORT_SYMBOL_GPL(msr_read); ++CORETEMP HARDWARE MONITORING DRIVER ++P: Rudolf Marek ++M: [EMAIL PROTECTED] ++L: [EMAIL PROTECTED] ++S: Maintained + -+static loff_t msr_fseek(struct file *file, loff_t offset, int orig) - { - loff_t ret = -EINVAL; - -@@ -161,7 +164,7 @@ static loff_t msr_seek(struct file *file, loff_t offset, int orig) - return ret; - } - --static ssize_t msr_read(struct file *file, char __user * buf, -+static ssize_t msr_fread(struct file *file, char __user * buf, - size_t count, loff_t * ppos) - { - u32 __user *tmp = (u32 __user *) buf; -@@ -174,7 +177,7 @@ static ssize_t msr_read(struct file *file, char __user * buf, - return -EINVAL; /* Invalid chunk size */ - - for (; count; count -= 8) { -- err = do_rdmsr(cpu, reg, &data[0], &data[1]); -+ err = msr_read(cpu, reg, &data[0], &data[1]); - if (err) - return err; - if (copy_to_user(tmp, &data, 8)) -@@ -185,7 +188,7 @@ static ssize_t msr_read(struct file *file, char __user * buf, - return ((char __user *)tmp) - buf; - } - --static ssize_t msr_write(struct file *file, const char __user *buf, -+static ssize_t msr_fwrite(struct file *file, const char __user *buf, - size_t count, loff_t *ppos) - { - const u32 __user *tmp = (const u32 __user *)buf; -@@ -200,7 +203,7 @@ static ssize_t msr_write(struct file *file, const char __user *buf, - for (; count; count -= 8) { - if (copy_from_user(&data, tmp, 8)) - return -EFAULT; -- err = do_wrmsr(cpu, reg, data[0], data[1]); -+ err = msr_write(cpu, reg, data[0], data[1]); - if (err) - return err; - tmp += 2; -@@ -209,7 +212,7 @@ static ssize_t msr_write(struct file *file, const char __user *buf, - return ((char __user *)tmp) - buf; - } - --static int msr_open(struct inode *inode, struct file *file) -+static int msr_fopen(struct inode *inode, struct file *file) - { - unsigned int cpu = iminor(file->f_path.dentry->d_inode); - struct cpuinfo_x86 *c = &(cpu_data)[cpu]; -@@ -227,10 +230,10 @@ static int msr_open(struct inode *inode, struct file *file) - */ - static const struct file_operations msr_fops = { - .owner = THIS_MODULE, -- .llseek = msr_seek, -- .read = msr_read, -- .write = msr_write, -- .open = msr_open, -+ .llseek = msr_fseek, -+ .read = msr_fread, -+ .write = msr_fwrite, -+ .open = msr_fopen, - }; - - static int msr_device_create(int i) + COSA/SRP SYNC SERIAL DRIVER + P: Jan "Yenya" Kasprzak + M: [EMAIL PROTECTED] diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 25b72a4..873e463 100644 +index 25b72a4..1d19717 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig -@@ -167,6 +167,15 @@ config SENSORS_ATXP1 +@@ -167,6 +167,14 @@ config SENSORS_ATXP1 This driver can also be built as a module. If so, the module will be called atxp1. +config SENSORS_CORETEMP + tristate "Intel Core (2) Duo/Solo temperature sensor" + depends on HWMON && X86 && EXPERIMENTAL -+ select X86_MSR + help + If you say yes here you get support for the temperature + sensor inside your CPU. Supported all are all known variants @@ -199,21 +104,20 @@ obj-$(CONFIG_SENSORS_FSCHER) += fscher.o diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c new file mode 100644 -index 0000000..f139b41 +index 0000000..a6d19c8 --- /dev/null +++ b/drivers/hwmon/coretemp.c -@@ -0,0 +1,400 @@ +@@ -0,0 +1,406 @@ +/* + * coretemp.c - Linux kernel module for hardware monitoring + * -+ * Copyright (C) 2006 Rudolf Marek <[EMAIL PROTECTED]> ++ * Copyright (C) 2007 Rudolf Marek <[EMAIL PROTECTED]> + * + * Inspired from many hwmon drivers + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. ++ * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -238,10 +142,11 @@ +#include <linux/mutex.h> +#include <linux/list.h> +#include <linux/platform_device.h> -+#include <asm/msr.h> +#include <linux/cpu.h> ++#include <asm/msr.h> ++#include <asm/processor.h> + -+#define DRVNAME "coretemp" ++#define DRVNAME "coretemp" + +typedef enum { SHOW_TEMP, SHOW_TJMAX, SHOW_LABEL, SHOW_NAME } SHOW; + @@ -260,8 +165,7 @@ + unsigned long last_updated; /* in jiffies */ + int temp; + int tjmax; -+ /* registers values */ -+ u32 therm_status; ++ u8 alarm; +}; + +static struct coretemp_data *coretemp_update_device(struct device *dev); @@ -270,7 +174,6 @@ + * Sysfs stuff + */ + -+ +static ssize_t show_name(struct device *dev, struct device_attribute + *devattr, char *buf) +{ @@ -290,7 +193,7 @@ +{ + struct coretemp_data *data = coretemp_update_device(dev); + /* read the Out-of-spec log, never clear */ -+ return sprintf(buf, "%d\n", (data->therm_status >> 5) & 1); ++ return sprintf(buf, "%d\n", data->alarm); +} + +static ssize_t show_temp(struct device *dev, @@ -298,9 +201,14 @@ +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct coretemp_data *data = coretemp_update_device(dev); -+ return sprintf(buf, "%d\n", -+ attr->index == -+ SHOW_TEMP ? data->temp : data->tjmax); ++ int err; ++ ++ if (attr->index == SHOW_TEMP) ++ err = data->valid ? sprintf(buf, "%d\n", data->temp) : -EAGAIN; ++ else ++ err = sprintf(buf, "%d\n", data->tjmax); ++ ++ return err; +} + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, @@ -334,14 +242,15 @@ + u32 eax, edx; + + data->valid = 0; -+ msr_read(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); -+ data->therm_status = eax; -+ ++ rdmsr_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); ++ data->alarm = (eax >> 5) & 1; + /* update only if data has been valid */ + if (eax & 0x80000000) { -+ data->temp = data->tjmax - (((data->therm_status >> 16) ++ data->temp = data->tjmax - (((eax >> 16) + & 0x7f) * 1000); + data->valid = 1; ++ } else { ++ dev_dbg(dev, "Temperature data invalid (0x%x)\n", eax); + } + data->last_updated = jiffies; + } @@ -366,33 +275,34 @@ + data->id = pdev->id; + data->name = "coretemp"; + mutex_init(&data->update_lock); -+ /* Tjmax default is 100C */ ++ /* Tjmax default is 100 degrees C */ + data->tjmax = 100000; + -+ /* Some processors have Tjmax 85 following magic should detect it */ -+ /* family is always 0x6 */ ++ /* test if we can access the THERM_STATUS MSR */ ++ err = rdmsr_safe_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); ++ if (err) { ++ dev_err(&pdev->dev, ++ "Unable to access THERM_STATUS MSR, giving up\n"); ++ goto exit_free; ++ } + -+ if (((c->x86_model == 0xf) && (c->x86_mask > 3 )) || -+ (c->x86_model == 0xe)) { ++ /* Some processors have Tjmax 85 following magic should detect it ++ Intel won't disclose the information without signed NDA, but ++ individuals cannot sign it. Catch(ed) 22. ++ */ + -+ err = msr_read(data->id, 0xee, &eax, &edx); ++ if (((c->x86_model == 0xf) && (c->x86_mask > 3)) || ++ (c->x86_model == 0xe)) { ++ err = rdmsr_safe_on_cpu(data->id, 0xee, &eax, &edx); + if (err) { + dev_warn(&pdev->dev, -+ "Unable to access MSR 0xEE, Tjmax left at %d\n", -+ data->tjmax); ++ "Unable to access MSR 0xEE, Tjmax left at %d" ++ "C\n", data->tjmax/1000); + } else if (eax & 0x40000000) { + data->tjmax = 85000; + } + } + -+ /* test if we can access the THERM_STATUS MSR */ -+ err = msr_read(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); -+ -+ if (err) { -+ dev_err(&pdev->dev, -+ "Unable to access THERM_STATUS MSR, giving up\n"); -+ goto exit_free; -+ } + platform_set_drvdata(pdev, data); + + if ((err = sysfs_create_group(&pdev->dev.kobj, &coretemp_group))) @@ -429,9 +339,9 @@ + +static struct platform_driver coretemp_driver = { + .driver = { -+ .owner = THIS_MODULE, -+ .name = DRVNAME, -+ }, ++ .owner = THIS_MODULE, ++ .name = DRVNAME, ++ }, + .probe = coretemp_probe, + .remove = __devexit_p(coretemp_remove), +}; @@ -445,7 +355,7 @@ +static LIST_HEAD(pdev_list); +static DEFINE_MUTEX(pdev_list_mutex); + -+static int __cpuinit coretemp_devices_add(unsigned int cpu) ++static int __cpuinit coretemp_device_add(unsigned int cpu) +{ + int err; + struct platform_device *pdev; @@ -456,18 +366,15 @@ + err = -ENOMEM; + printk(KERN_ERR DRVNAME ": Device allocation failed\n"); + goto exit; -+ + } + + pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); -+ + if (!pdev_entry) { + err = -ENOMEM; + goto exit_device_put; + } + + err = platform_device_add(pdev); -+ + if (err) { + printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", + err); @@ -491,7 +398,7 @@ +} + +#ifdef CONFIG_HOTPLUG_CPU -+void coretemp_devices_remove(unsigned int cpu) ++void coretemp_device_remove(unsigned int cpu) +{ + struct pdev_entry *p, *n; + mutex_lock(&pdev_list_mutex); @@ -512,10 +419,10 @@ + + switch (action) { + case CPU_ONLINE: -+ coretemp_devices_add(cpu); ++ coretemp_device_add(cpu); + break; + case CPU_DEAD: -+ coretemp_devices_remove(cpu); ++ coretemp_device_remove(cpu); + break; + } + return NOTIFY_OK; @@ -531,7 +438,11 @@ + int i, err = -ENODEV; + struct pdev_entry *p, *n; + -+ if (current_cpu_data.x86_vendor != X86_VENDOR_INTEL) ++ printk(KERN_NOTICE DRVNAME ": This driver uses undocumented features" ++ " of Core CPU. Temperature might be wrong!\n"); ++ ++ /* quick check if we run Intel */ ++ if (cpu_data[0].x86_vendor != X86_VENDOR_INTEL) + goto exit; + + err = platform_driver_register(&coretemp_driver); @@ -548,14 +459,14 @@ + /* supported CPU not found, but report the unknown + family 6 CPU */ + if ((c->x86 == 0x6) && (c->x86_model > 0xf)) -+ printk(KERN_WARNING DRVNAME ": Unknown CPU, please" -+ " report to the [EMAIL PROTECTED]"); ++ printk(KERN_WARNING DRVNAME ": Unknown CPU" ++ "model %x\n", c->x86_model); + continue; + } + -+ err = coretemp_devices_add(i); ++ err = coretemp_device_add(i); + if (err) -+ goto exit_driver; ++ goto exit_devices_unreg; + } + if (list_empty(&pdev_list)) { + err = -ENODEV; @@ -567,7 +478,7 @@ +#endif + return 0; + -+exit_driver: ++exit_devices_unreg: + mutex_lock(&pdev_list_mutex); + list_for_each_entry_safe(p, n, &pdev_list, list) { + platform_device_unregister(p->pdev); @@ -603,31 +514,3 @@ + +module_init(coretemp_init) +module_exit(coretemp_exit) -diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h -index ec3b680..ff73a99 100644 ---- a/include/asm-i386/msr.h -+++ b/include/asm-i386/msr.h -@@ -97,6 +97,9 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) - } - #endif /* CONFIG_SMP */ - -+int msr_write(int cpu, u32 reg, u32 eax, u32 edx); -+int msr_read(int cpu, u32 reg, u32 *eax, u32 *edx); -+ - /* symbolic names for some interesting MSRs */ - /* Intel defined MSRs. */ - #define MSR_IA32_P5_MC_ADDR 0 -diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h -index 902f9a5..90662f4 100644 ---- a/include/asm-x86_64/msr.h -+++ b/include/asm-x86_64/msr.h -@@ -160,6 +160,9 @@ static inline unsigned int cpuid_edx(unsigned int op) - #define MSR_IA32_UCODE_WRITE 0x79 - #define MSR_IA32_UCODE_REV 0x8b - -+int msr_write(int cpu, u32 reg, u32 eax, u32 edx); -+int msr_read(int cpu, u32 reg, u32 *eax, u32 *edx); -+ - #ifdef CONFIG_SMP - void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); - void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); Added: trunk/kernel/mactel-patches-2.6.21/0008-msr.patch =================================================================== --- trunk/kernel/mactel-patches-2.6.21/0008-msr.patch (rev 0) +++ trunk/kernel/mactel-patches-2.6.21/0008-msr.patch 2007-03-21 10:58:05 UTC (rev 91) @@ -0,0 +1,143 @@ +Use functions provided by arch/*/lib/msr-on-cpu.c in arch/i386/kernel/msr.c. + +From: Nicolas Boichat <[EMAIL PROTECTED]> + + +--- + + arch/i386/kernel/msr.c | 106 ++---------------------------------------------- + 1 files changed, 4 insertions(+), 102 deletions(-) + +diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c +index bcaa6e9..8cd0a91 100644 +--- a/arch/i386/kernel/msr.c ++++ b/arch/i386/kernel/msr.c +@@ -45,104 +45,6 @@ + + static struct class *msr_class; + +-static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) +-{ +- int err; +- +- err = wrmsr_safe(reg, eax, edx); +- if (err) +- err = -EIO; +- return err; +-} +- +-static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx) +-{ +- int err; +- +- err = rdmsr_safe(reg, eax, edx); +- if (err) +- err = -EIO; +- return err; +-} +- +-#ifdef CONFIG_SMP +- +-struct msr_command { +- int err; +- u32 reg; +- u32 data[2]; +-}; +- +-static void msr_smp_wrmsr(void *cmd_block) +-{ +- struct msr_command *cmd = (struct msr_command *)cmd_block; +- +- cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]); +-} +- +-static void msr_smp_rdmsr(void *cmd_block) +-{ +- struct msr_command *cmd = (struct msr_command *)cmd_block; +- +- cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]); +-} +- +-static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) +-{ +- struct msr_command cmd; +- int ret; +- +- preempt_disable(); +- if (cpu == smp_processor_id()) { +- ret = wrmsr_eio(reg, eax, edx); +- } else { +- cmd.reg = reg; +- cmd.data[0] = eax; +- cmd.data[1] = edx; +- +- smp_call_function_single(cpu, msr_smp_wrmsr, &cmd, 1, 1); +- ret = cmd.err; +- } +- preempt_enable(); +- return ret; +-} +- +-static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx) +-{ +- struct msr_command cmd; +- int ret; +- +- preempt_disable(); +- if (cpu == smp_processor_id()) { +- ret = rdmsr_eio(reg, eax, edx); +- } else { +- cmd.reg = reg; +- +- smp_call_function_single(cpu, msr_smp_rdmsr, &cmd, 1, 1); +- +- *eax = cmd.data[0]; +- *edx = cmd.data[1]; +- +- ret = cmd.err; +- } +- preempt_enable(); +- return ret; +-} +- +-#else /* ! CONFIG_SMP */ +- +-static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) +-{ +- return wrmsr_eio(reg, eax, edx); +-} +- +-static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) +-{ +- return rdmsr_eio(reg, eax, edx); +-} +- +-#endif /* ! CONFIG_SMP */ +- + static loff_t msr_seek(struct file *file, loff_t offset, int orig) + { + loff_t ret = -EINVAL; +@@ -174,9 +76,9 @@ static ssize_t msr_read(struct file *file, char __user * buf, + return -EINVAL; /* Invalid chunk size */ + + for (; count; count -= 8) { +- err = do_rdmsr(cpu, reg, &data[0], &data[1]); ++ err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]); + if (err) +- return err; ++ return -EIO; + if (copy_to_user(tmp, &data, 8)) + return -EFAULT; + tmp += 2; +@@ -200,9 +102,9 @@ static ssize_t msr_write(struct file *file, const char __user *buf, + for (; count; count -= 8) { + if (copy_from_user(&data, tmp, 8)) + return -EFAULT; +- err = do_wrmsr(cpu, reg, data[0], data[1]); ++ err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]); + if (err) +- return err; ++ return -EIO; + tmp += 2; + } + This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site. ------------------------------------------------------------------------- Take Surveys. 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