Actually, the problem I had with quotes was when using the variables in a macro or a define. For instance, $(notdir ...) fails with a variable with quotes in it.
I'm currently rewriting my makefiles to get around this issue. Thanks, Rob -----Original Message----- From: Eli Zaretskii [mailto:e...@gnu.org] Sent: Monday, May 09, 2011 12:14 PM To: Rob Juergens Cc: make-w32@gnu.org Subject: Re: enhancement request for gmake > From: Rob Juergens <rjuerg...@esri.com> > CC: "make-w32@gnu.org" <make-w32@gnu.org> > Date: Mon, 9 May 2011 11:04:10 -0700 > > > You can always write a batch file, cc.cmd, say, that accepts the -m32 > > etc. switches and invokes the right program. It would be a very > > simple batch file, no? > > No, such a batch file is not simple. The make files must be able to run in > any environment (Windoze, Solaris, Linux, etc). But the name of the compiler is different on each platform anyway, right? So on Windows that name could be the batch file and on other platforms it could be the compiler itself. I'm sorry, I don't see the problem. > The problem here is that make still doesn't understand the issue. If I have > the lines: > > %.$(OBJ_EXT) : %.c > $(ProgramFiles)/Microsoft ... or > $(VSINSTALLDIR)/bin/cl > Make will still only look for the first token (up to the first space). You need to quote that. > If I put quotes around it, make includes the quotes when looking for the name. Are you saying that commands in quotes don't work for you? They do for me. Can you show a simple Makefile which doesn't work due to quotes? _______________________________________________ Make-w32 mailing list Make-w32@gnu.org https://lists.gnu.org/mailman/listinfo/make-w32