On Thu, Apr 1, 2010 at 7:07 PM, Adnan Khaleel <[email protected]> wrote:
>
> In oooexec.cpp
>
> int ReorderBufferEntry::issueload(LoadStoreQueueEntry& state, Waddr&
> origaddr, W64 ra, W64 rb, W64 rc, PTEUpdate& pteupdate)
>
> I don't quite understand when the data actually gets assigned to the state
> datastructure.
> W64 data is declared but then its assigned to state in
>
> if(!config.verify_cache){
> state.data = data;
> state.invalid = 0;
> state.bytemask = 0xff;
> }
>
> without any place where data is populated.
>
> By default, PTLsim always put the data into 'state.data' field before the
cache request was served. We change this model and now the data is loaded
when the cache request is served to maintain the correctness in multi-core
coherent caches. All the real data is read using Context::loadvirt() and
write using Context::storevirt() functions. If you look at
OutOfOrderCoreCacheCallbacks::dcache_wakeup(), you will find following line:
data = thread->ctx.loadvirt(rob.lsq->virtaddr, sizeshift);
The data is loaded when the cache request is served and it is checked for
most recent data in LSQ if there is a store pending on same cache line.
- Avadh
What I'm really interested in is when is the true data being read from
> Qemu's memory.
>
> Thanks
>
> AK
>
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>
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