On 12/17/2010 4:54 PM, Stephan Diestelhorst wrote:
On Tuesday 14 December 2010 16:54:47 avadh patel wrote:
On Tue, Dec 14, 2010 at 6:25 AM, Shen
Zhong<[email protected]<mailto:[email protected]>> wrote:
On Tuesday 14,December,2010 03:50 PM, Shen Zhong wrote:
On Thursday 09,December,2010 12:43 AM, avadh patel wrote:
On Wed, Dec 8, 2010 at 6:09 AM, Shen
Zhong<[email protected]<mailto:[email protected]>> wrote:
Suppose I know a certain virtual address, and I need to read the
corresponding data from the main memory in ptlsim, but I don't want to
add an entry to the load store queue, since there was no such load
instruction in the application we are running.
Yes you are right about no data memory in simulated model. You can read the data
using 'Context::loadvirt' function. But before using that function you need to
make sure
that requested virtual address doesn't have page fault.
Now I can read the data from memory. I use the "has_page_fault"
function to check whether there is page fault. However, sometimes there are
page faults, but I still want to read the data even if there is page fault. How
can I handle it?
Sorry, I solved the problem by calling the "handle_page_fault" function, but I
still got error of
OutOfOrderMachine::run(PTLsimConfig&): Assertion `ctx.handle_interrupt == 1'
failed.
How can I handle this ?
Thanks!
In case of page fault, you should not try to fix it because it will put the
simulation CPU context into unstable state. So if you want to read data from
memory that has page fault, you have to wait till the fault has been handled by
the CPU simulation. Once the fault is handled and data is loaded from
hard-drive to RAM then program execution will begin from the same location so
you will not miss any memory read/write in your trace.
What you would usually do is to record physical addresses in the core
and read those memory locations. If you do not want the memory locations
to be paged out, you need to pin them in the application / OS you are
simulating. (Under Linux applications you can use mmap.)
Maybe if you can shed some light about what you are trying to read, we
could help more :-)
Stephan
Thank you very much, Avadh and Stephan. What we are trying to do is:
We want to collect load and store trace of multi-threaded parsec
benchmarks. However, some other processes may also issue load and store
instructions, so we need to identify the instructions we are interested
in. So we need the pid of the current running process. In addition, we
also need to identify which thread the instruction belongs to. So we
need the tid of current running thread. In a word, for each load and
store instruction, we need to figure out the tid and pid.
By dumping the pthread_self() and getpid() function, we found that
%fs+0x10 is the address of tid, %fs+0x2d4 is the address of pid, so we
read those memory address to figure out the pid and tid. However there
may be page fault sometimes.
Our solution is: we use stroe the trace in different files, using tid
address (%fs+0x10) as the file name. Meanwhile, when we can read pid and
tid, we record the the corresponding tid and pid for each tid address.
Then we will know which file is of our interest, and we can also
identify the traces of different thread. Besides, by calling the
pthread_self() function inside the benchmark, we can find out the thread
id of the threads in the benchmark.
For CR3 register, I checked its content, the content remains the same
all the time.
Thanks again!
-Regards
Shen Zhong
_______________________________________________
http://www.marss86.org
Marss86-Devel mailing list
[email protected]
https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel