Many thanks for the reply.
I made a single core with 2 threads case for debugging:
The code I changed:
define NUM_SIM_CORES 1 "in Makefile"
"global.h"
static const int NUMBER_OF_CORES = NUM_SIM_CORES;
static const int NUMBER_OF_THREAD_PER_CORE = 2;
static const int MAX_THREADS_PER_CORE = 2;
"vl.c"
int smp_cpus = NUM_SIM_CORES*2
The simulation stop in "bool OutOfOrderCore::runcycle() " of line 785 of
ooocore.cpp because of pipeline deadlock for thread 1 of core 0 (single core
configuration for this simulation).
"
[vcpu 1] thread 1: WARNING: At cycle 221236, 242224 user commits: no
instructions have committed for 204801 cycles; the pipeline could be deadlocked
"
Simulation is canneal with simsmall input
The gdb debug information is as following:
(gdb) p sim_cycle
$20 = 221236
(gdb) p this->threads[0]->last_commit_at_cycle
$16 = 221236
(gdb) p this->threads[0]->total_insns_committed
$17 = 240799
(gdb) p this->threads[1]->total_insns_committed
$18 = 1425
(gdb) p this->threads[1]->last_commit_at_cycle
$19 = 16435
The thread 0 looks fine, but thread 1 deadlocked for some reasons. Any clue
about it will be highly appreciated!
Thanks,
HZ
code stopped as following marked as "//<<<<<"
"
foreach (i, threadcount) {
ThreadContext* thread = threads[i];
if unlikely (!thread->ctx.running) break;
if unlikely ((sim_cycle - thread->last_commit_at_cycle) > 50*4096) {
stringbuf sb;
sb << "[vcpu ", thread->ctx.cpu_index, "] thread ", thread->threadid, ":
WARNING: At cycle ",
sim_cycle, ", ", total_user_insns_committed, " user commits: no
instructions have committed for ",
(sim_cycle - thread->last_commit_at_cycle), " cycles; the pipeline
could
be deadlocked", endl;
ptl_logfile << sb, flush;
cerr << sb, flush;
dump_smt_state(ptl_logfile);
ptl_logfile << " memoryHierarchy: ",endl;
machine.memoryHierarchyPtr->dump_info(ptl_logfile);
ptl_logfile.flush();
exiting = 1;
assert(0); //<<<<<
assert_fail(__STRING(0), __FILE__, __LINE__, __PRETTY_FUNCTION__);
}
}
"
________________________________
From: avadh patel <[email protected]>
To: Hz Xes <[email protected]>
Sent: Fri, April 22, 2011 12:49:01 PM
Subject: Re: [marss86-devel] Does Marss support SMT ?
On Thu, Apr 21, 2011 at 7:13 PM, Hz Xes <[email protected]> wrote:
Greeting,
>
>Does Marss support SMT? I would like to do experiments for the configurations
>such as 2 cores and 2 hardware threads per core. It looks like the code
>support
>SMT, but it crashed when I ran the simulations with SMT configurations. And I
>made some necessary changes on several hard-coded variables.
>
>
>I made some necessary changes on several hard-coded variables for supporting
>SMT. My changes are as following:
>
>"global.h"
>static const int NUMBER_OF_CORES = NUM_SIM_CORES;
>static const int NUMBER_OF_THREAD_PER_CORE = 2;
>static const int MAX_THREADS_PER_CORE = 2;
>
>"vl.c"
>int smp_cpus = NUM_SIM_CORES*NUMBER_SIM_THREAD_PER_CORE ;
>
>
>Do I need to do more changes than these for supporting SMT?
>
>
This should work. Yes SMT is supported in MARSS. If it doesn't work then please
post the errors.
- Avadh
Thanks,
>HZ
>
>_______________________________________________
>http://www.marss86.org
>Marss86-Devel mailing list
>[email protected]
>https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
>
>
_______________________________________________
http://www.marss86.org
Marss86-Devel mailing list
[email protected]
https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
